公开(公告)号：US11057637B1

公开(公告)日：2021-07-06

申请号：US16775463

申请日：2020-01-29

Applicant: Mellanox Technologies, Ltd. ,  BEAMR IMAGING LTD.

Inventor： Dotan David Levi ,  Assaf Weissman ,  Ohad Markus ,  Uri Gadot ,  Aviad Raveh ,  Tamar Shoham

IPC: H04N19/52 ,  H04N19/177 ,  H04N19/176

Abstract: A video processor includes a memory and a processor. The processor is coupled to memory and is configured to store in the memory (i) multiple raw frames belonging to a Group of Pictures (GOP) to be processed, and (ii) one or more reference frames. The processor is further configured to select for multiple target blocks having a same block-location in respective raw frames associated with a common reference frame, a common search region in the common reference frame, and before selecting another search region, to apply at least two motion estimation operations using at least two of the target blocks and the common search region, to estimate respective at least two Motion Vectors (MVs).

公开(公告)号：US20210168354A1

公开(公告)日：2021-06-03

申请号：US17095765

申请日：2020-11-12

Applicant: MELLANOX TECHNOLOGIES, LTD. ,  BEAMR IMAGING LTD.

Inventor： Dotan David Levi ,  Assaf Weissman ,  Ohad Markus ,  Uri Gadot ,  Aviad Raveh ,  Dror Gill ,  Nikolay Terterov ,  Pavel Titkov ,  Alexey Mitkovets ,  Alexey Martemyanov ,  Alexander Zheludkov

IPC: H04N19/105 ,  H04N19/119 ,  H04N19/159 ,  H04N19/51 ,  H04N19/176

Abstract: A video coding system including an acceleration device including input circuitry configured, for each of a first plurality of video frames to be encoded, to receive an input including at least one raw video frame and at least one reference frame, and to divide each of the first plurality of video frames to be encoded into a second plurality of blocks, and similarity computation circuitry configured, for each one of the first plurality of video frame to be encoded: for each the block of the second plurality of blocks, to produce an intra-prediction hint and an intra-prediction direction. Related apparatus and methods are also provided.

公开(公告)号：US12238273B2

公开(公告)日：2025-02-25

申请号：US17095765

申请日：2020-11-12

Applicant: MELLANOX TECHNOLOGIES, LTD. ,  BEAMR IMAGING LTD.

Inventor： Dotan David Levi ,  Assaf Weissman ,  Ohad Markus ,  Uri Gadot ,  Aviad Raveh ,  Dror Gill ,  Nikolay Terterov ,  Pavel Titkov ,  Alexey Mitkovets ,  Alexey Martemyanov ,  Alexander Zheludkov

IPC: H04N19/105 ,  H04N19/119 ,  H04N19/159 ,  H04N19/176 ,  H04N19/51

Abstract: A video coding system including an acceleration device including input circuitry configured, for each of a first plurality of video frames to be encoded, to receive an input including at least one raw video frame and at least one reference frame, and to divide each of the first plurality of video frames to be encoded into a second plurality of blocks, and similarity computation circuitry configured, for each one of the first plurality of video frame to be encoded: for each the block of the second plurality of blocks, to produce an intra-prediction hint and an intra-prediction direction. Related apparatus and methods are also provided.

公开(公告)号：US20210235107A1

公开(公告)日：2021-07-29

申请号：US16775463

申请日：2020-01-29

Applicant: Mellanox Technologies, Ltd. ,  BEAMR IMAGING LTD.

Inventor： Dotan David Levi ,  Assaf Weissman ,  Ohad Markus ,  Uri Gadot ,  Aviad Raveh ,  Tamar Shoham

IPC: H04N19/52 ,  H04N19/176 ,  H04N19/177

Abstract: A video processor includes a memory and a processor. The processor is coupled to memory and is configured to store in the memory (i) multiple raw frames belonging to a Group of Pictures (GOP) to be processed, and (ii) one or more reference frames. The processor is further configured to select for multiple target blocks having a same block-location in respective raw frames associated with a common reference frame, a common search region in the common reference frame, and before selecting another search region, to apply at least two motion estimation operations using at least two of the target blocks and the common search region, to estimate respective at least two Motion Vectors (MVs).

公开(公告)号：US08982703B2

公开(公告)日：2015-03-17

申请号：US13717733

申请日：2012-12-18

Applicant: Mellanox Technologies Ltd.

Inventor： Ariel Almog ,  Yaniv Saar ,  Aviad Raveh ,  Dror Goldenberg

IPC: G01R31/08 ,  H04L12/851 ,  H04L12/725 ,  H04L12/823

CPC classification number: H04L47/2441 ,  H04L45/306 ,  H04L47/32

Abstract: A method for communication in a packet data network including at least first and second subnets interconnected by routers. The method includes defining at least first and second classes of link-layer traffic within the subnets, such that the link-layer traffic in the first class is transmitted among nodes in the network without loss of packets, while at least some of the packets in the second class are dropped in case of network congestion. The routers are configured by transmitting control traffic over the network in the packets of the second class. Data traffic is transmitted between the nodes in the first and second subnets via the configured routers in the packets of the first class.

Abstract translation: 一种用于在分组数据网络中进行通信的方法，包括至少由路由器互连的第一和第二子网。 该方法包括在子网内至少定义第一类和第二类链路层业务，使得第一类中的链路层业务在网络中的节点之间传输而不丢失分组，而至少一些分组在 第二类在网络拥塞的情况下被丢弃。 通过在第二类的分组中的网络上发送控制流量来配置路由器。 经由第一类数据包中配置的路由器在第一和第二子网中的节点之间传输数据流量。

公开(公告)号：US11543852B2

公开(公告)日：2023-01-03

申请号：US16779611

申请日：2020-02-02

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Liron Mula ,  Ariel Almog ,  Aviad Raveh ,  Yuval Itkin

IPC: G06F1/12 ,  H03C3/09

Abstract: In one embodiment, a network interface card device includes communication interfaces to provide data connection with respective local devices configured to run respective clock synchronization clients, at least one network interface to provide data connection between a packet data network and ones of the local devices, and a hardware clock to maintain a time value, and serve the clock synchronization clients.

公开(公告)号：US20140169169A1

公开(公告)日：2014-06-19

申请号：US13717733

申请日：2012-12-18

Applicant: MELLANOX TECHNOLOGIES LTD.

Inventor： Ariel Almog ,  Yaniv Saar ,  Aviad Raveh ,  Dror Goldenberg

IPC: H04L12/56

CPC classification number: H04L47/2441 ,  H04L45/306 ,  H04L47/32

Abstract: A method for communication in a packet data network including at least first and second subnets interconnected by routers. The method includes defining at least first and second classes of link-layer traffic within the subnets, such that the link-layer traffic in the first class is transmitted among nodes in the network without loss of packets, while at least some of the packets in the second class are dropped in case of network congestion. The routers are configured by transmitting control traffic over the network in the packets of the second class. Data traffic is transmitted between the nodes in the first and second subnets via the configured routers in the packets of the first class.

Abstract translation: 一种用于在分组数据网络中进行通信的方法，包括至少由路由器互连的第一和第二子网。 该方法包括在子网内至少定义第一类和第二类链路层业务，使得第一类中的链路层业务在网络中的节点之间传输而不丢失分组，而至少一些分组在 第二类在网络拥塞的情况下被丢弃。 通过在第二类的分组中的网络上发送控制流量来配置路由器。 经由第一类数据包中配置的路由器在第一和第二子网中的节点之间传输数据流量。

公开(公告)号：US11070304B1

公开(公告)日：2021-07-20

申请号：US16799873

申请日：2020-02-25

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Liron Mula ,  Avraham Ganor ,  Avi Urman ,  Aviad Raveh ,  Yuval Itkin ,  Oren Matus

IPC: H04J3/06

Abstract: In one embodiment, a computer apparatus includes a first NIC including at least one network interface port to transfer data with a first packet-data network (PDN) including a master clock to provide a clock synchronization signal S1, a first physical hardware clock (PHC) to maintain a time value T1 responsively to S1, and a first clock controller to generate a clock synchronization signal S2 responsively to S1, S2 having a frequency set responsively to S1, and send S2 over a connection to a second NIC including at least one network interface port to transfer data with a second PDN, a second PHC, and a second clock controller to receive S2, update the second PHC with a time value T2 responsively to S2, send another clock synchronization signal to network nodes in the second PDN responsively to T2, the second NIC acting as a master clock in the second PDN.

公开(公告)号：US20210141413A1

公开(公告)日：2021-05-13

申请号：US16779611

申请日：2020-02-02

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Liron Mula ,  Ariel Almog ,  Aviad Raveh ,  Yuval Itkin

IPC: G06F1/12 ,  H03C3/09

Abstract: In one embodiment, a network interface card device includes communication interfaces to provide data connection with respective local devices configured to run respective clock synchronization clients, at least one network interface to provide data connection between a packet data network and ones of the local devices, and a hardware clock to maintain a time value, and serve the clock synchronization clients.