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公开(公告)号:US20250047402A1
公开(公告)日:2025-02-06
申请号:US18229074
申请日:2023-08-01
Applicant: Mellanox Technologies, Ltd.
Inventor: Yam Gellis , Oren Matus , Liron Mula , Natan Manevich , Hillel Chapman , Dotan David Levi
IPC: H04J3/06
Abstract: A device includes a receiver including a timestamp generator to update timestamps at a first rate. The receiver is to estimate a first time for receiving a signal, wherein the signal is associated with a synchronization operation. The receiver is further to receive the signal at a second time. The receiver is further to determine a difference between the second time and the first time, wherein the difference is associated with an error of the timestamp generator of the receiver. The receiver can also adjust the first rate to a second rate at which to update the timestamps by the timestamp generator, responsive to determining the difference between the first time and the second time.
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公开(公告)号:US11070304B1
公开(公告)日:2021-07-20
申请号:US16799873
申请日:2020-02-25
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Dotan David Levi , Liron Mula , Avraham Ganor , Avi Urman , Aviad Raveh , Yuval Itkin , Oren Matus
IPC: H04J3/06
Abstract: In one embodiment, a computer apparatus includes a first NIC including at least one network interface port to transfer data with a first packet-data network (PDN) including a master clock to provide a clock synchronization signal S1, a first physical hardware clock (PHC) to maintain a time value T1 responsively to S1, and a first clock controller to generate a clock synchronization signal S2 responsively to S1, S2 having a frequency set responsively to S1, and send S2 over a connection to a second NIC including at least one network interface port to transfer data with a second PDN, a second PHC, and a second clock controller to receive S2, update the second PHC with a time value T2 responsively to S2, send another clock synchronization signal to network nodes in the second PDN responsively to T2, the second NIC acting as a master clock in the second PDN.
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