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公开(公告)号:US11809838B2
公开(公告)日:2023-11-07
申请号:US17365034
申请日:2021-07-01
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Han-Wen Hu , Yung-Chun Lee , Bo-Rong Lin , Huai-Mu Wang
CPC classification number: G06F7/5443 , G11C7/06
Abstract: A memory device and an operation method thereof are provided. The memory device includes: a memory array including a plurality of memory cells for storing a plurality of weights; a multiplication circuit coupled to the memory array, for performing bitwise multiplication on a plurality of input data and the weights to generate a plurality of multiplication results; a counting unit coupled to the multiplication circuit, for performing bitwise counting on the multiplication results to generate a MAC (multiplication and accumulation) operation result.
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公开(公告)号:US12106070B2
公开(公告)日:2024-10-01
申请号:US17375024
申请日:2021-07-14
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Han-Wen Hu , Yung-Chun Lee , Bo-Rong Lin , Huai-Mu Wang
CPC classification number: G06F7/5443 , G06J1/00 , Y02D10/00
Abstract: A memory device and an operation method thereof are provided. The memory device includes: a memory array including a plurality of memory cells for storing a plurality of weights; a multiplication circuit for performing bitwise multiplication on a plurality of input data and the weights to generate a plurality of multiplication results, wherein in performing bitwise multiplication, the memory cells generate a plurality of memory cell currents; a digital accumulating circuit for performing a digital accumulating on the multiplication results; an analog accumulating circuit for performing an analog accumulating on the memory cell currents to generate a first MAC operation result; and a decision unit for deciding whether to perform the analog accumulating, the digital accumulating or a hybrid accumulating, wherein in performing the hybrid accumulating, whether the digital accumulating circuit is triggered is based on the first MAC operation result.
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公开(公告)号:US20220076762A1
公开(公告)日:2022-03-10
申请号:US17321933
申请日:2021-05-17
Applicant: Macronix International Co., Ltd.
Inventor: Yung-Chun Lee , Yu-Ming Huang , Han-Wen Hu
Abstract: Methods, devices, and systems for determining read voltages for memory systems are provided. In one aspect, a memory device includes an array of memory cells, an accumulating circuit, and a controller. Each of the memory cells is coupled to a corresponding word line of multiple word lines and a corresponding bit line of multiple bit lines. The accumulating circuit is configured to: when data stored in a page is read out by applying each of a plurality of read voltages on a word line corresponding to the page, accumulate read-out signals from multiple memory cells in the page to generate a respective output value that corresponds to the accumulated read-out signals for the read voltage. The controller is configured to determine a calibrated read voltage for the page based on the respective output values and the plurality of read voltages.
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公开(公告)号:US11631467B2
公开(公告)日:2023-04-18
申请号:US17321933
申请日:2021-05-17
Applicant: Macronix International Co., Ltd.
Inventor: Yung-Chun Lee , Yu-Ming Huang , Han-Wen Hu
Abstract: Methods, devices, and systems for determining read voltages for memory systems are provided. In one aspect, a memory device includes an array of memory cells, an accumulating circuit, and a controller. Each of the memory cells is coupled to a corresponding word line of multiple word lines and a corresponding bit line of multiple bit lines. The accumulating circuit is configured to: when data stored in a page is read out by applying each of a plurality of read voltages on a word line corresponding to the page, accumulate read-out signals from multiple memory cells in the page to generate a respective output value that corresponds to the accumulated read-out signals for the read voltage. The controller is configured to determine a calibrated read voltage for the page based on the respective output values and the plurality of read voltages.
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