Method to increase breakdown voltage of semiconductor devices
    2.
    发明授权
    Method to increase breakdown voltage of semiconductor devices 有权
    提高半导体器件击穿电压的方法

    公开(公告)号:US08318562B2

    公开(公告)日:2012-11-27

    申请号:US12061358

    申请日:2008-04-02

    IPC分类号: H01L21/336

    摘要: Methods of achieving high breakdown voltages in semiconductor devices by suppressing the surface flashover using high dielectric strength insulating encapsulation material are generally described. In one embodiment of the present invention, surface flashover in AlGaN/GaN heterostructure field-effect transistors (HFETs) is suppressed by using high dielectric strength insulating encapsulation material. Surface flashover in as-fabricated III-Nitride based HFETs limits the operating voltages at levels well below the breakdown voltages of GaN.

    摘要翻译: 一般来说,通过使用高介电强度绝缘包封材料抑制表面闪络来实现半导体器件中的高击穿电压的方法。 在本发明的一个实施例中,通过使用高介电强度绝缘封装材料来抑制AlGaN / GaN异质结构场效应晶体管(HFET)中的表面闪络。 基于III-Nitride的HFET的表面闪络将工作电压限制在远低于GaN击穿电压的水平。

    Novel Method to Increase Breakdown Voltage of Semiconductor Devices
    3.
    发明申请
    Novel Method to Increase Breakdown Voltage of Semiconductor Devices 有权
    提高半导体器件击穿电压的新方法

    公开(公告)号:US20090090984A1

    公开(公告)日:2009-04-09

    申请号:US12061358

    申请日:2008-04-02

    IPC分类号: H01L29/78 H01L21/31

    摘要: Methods of achieving high breakdown voltages in semiconductor devices by suppressing the surface flashover using high dielectric strength insulating encapsulation material are generally described. In one embodiment of the present invention, surface flashover in AlGaN/GaN heterostructure field-effect transistors (HFETs) is suppressed by using high dielectric strength insulating encapsulation material. Surface flashover in as-fabricated III-Nitride based HFETs limits the operating voltages at levels well below the breakdown voltages of GaN.

    摘要翻译: 一般来说,通过使用高介电强度绝缘包封材料抑制表面闪络来实现半导体器件中的高击穿电压的方法。 在本发明的一个实施例中,通过使用高介电强度绝缘封装材料来抑制AlGaN / GaN异质结构场效应晶体管(HFET)中的表面闪络。 基于III-Nitride的HFET的表面闪络将工作电压限制在远低于GaN击穿电压的水平。

    Selectively area regrown III-nitride high electron mobility transistor
    5.
    发明授权
    Selectively area regrown III-nitride high electron mobility transistor 有权
    选择性区域再生长的III族氮化物高电子迁移率晶体管

    公开(公告)号:US08796097B2

    公开(公告)日:2014-08-05

    申请号:US13870558

    申请日:2013-04-25

    摘要: Methods for forming a HEMT device are provided. The method includes forming an ultra-thin barrier layer on the plurality of thin film layers. A dielectric thin film layer is formed over a portion of the ultra-thin barrier layer to leave exposed areas of the ultra-thin barrier layer. A SAG S-D thin film layer is formed over the exposed areas of the ultra-thin barrier layer while leaving the dielectric thin film layer exposed. The dielectric thin film layer is then removed to expose the underlying ultra-thin barrier layer. The underlying ultra-thin barrier layer is treating with fluorine to form a treated area. A source and drain is added on the SAG S-D thin film layer, and a dielectric coating is deposited over the ultra-thin barrier layer treated with fluorine such that the dielectric coating is positioned between the source and the drain.

    摘要翻译: 提供了形成HEMT器件的方法。 该方法包括在多个薄膜层上形成超薄势垒层。 在超薄阻挡层的一部分上形成电介质薄膜层以留下超薄势垒层的暴露区域。 在超薄阻挡层的暴露区域上形成SAG S-D薄膜层,同时露出电介质薄膜层。 然后去除电介质薄膜层以暴露下面的超薄势垒层。 用氟处理下面的超薄阻挡层以形成处理区域。 在SAG S-D薄膜层上添加源极和漏极,并且在用氟处理的超薄势垒层上沉积电介质涂层,使得介电涂层位于源极和漏极之间。

    MULTILAYER BARRIER III-NITRIDE TRANSISTOR FOR HIGH VOLTAGE ELECTRONICS
    6.
    发明申请
    MULTILAYER BARRIER III-NITRIDE TRANSISTOR FOR HIGH VOLTAGE ELECTRONICS 有权
    用于高压电子的多层氮化物III-NITRIDE晶体管

    公开(公告)号:US20110108887A1

    公开(公告)日:2011-05-12

    申请号:US12941332

    申请日:2010-11-08

    IPC分类号: H01L29/778 H01L21/335

    摘要: An improved high breakdown voltage semiconductor device and method for manufacturing is provided. The device has a substrate and a AlaGa1-aN layer on the substrate wherein 0.1≦a≦1.00. A GaN layer is on the AlaGa1-aN layer. An In1-bGabN/GaN channel layer is on the GaN layer wherein 0.1≦b≦1.00. A AlcIndGa1-c-dN spacer layer is on the In1-bGabN/GaN layer wherein 0.1≦c≦1.00 and 0.0≦d≦0.99. A AleIn1-eN nested superlattice barrier layer is on the AlcIndGa1-c-dN spacer layer wherein 0.10≦e≦0.99. A AlfIngGa1-f-gN leakage suppression layer is on the AleIn1-eN barrier layer wherein 0.1≦f≦0.99 and 0.1≦g≦0.99 wherein the leakage suppression layer decreases leakage current and increases breakdown voltage during high voltage operation. A superstructure, preferably with metallic electrodes, is on the AlfIngGa1-f-gN leakage suppression layer.

    摘要翻译: 提供了一种改进的高击穿电压半导体器件及其制造方法。 该器件在衬底上具有衬底和AlaGa1-aN层,其中0.1< 1; a≦̸ 1.00。 Ala层在AlaGa1-aN层上。 In 1-bGabN / GaN沟道层位于GaN层上,其中0.1< 1; b≦̸ 1.00。 AlcIndGa1-c-dN间隔层位于In1-bGabN / GaN层上,其中0.1& NlE; c≦̸ 1.00和0.0& nlE; d≦̸ 0.99。 AlInInGa1-c-dN间隔层上的AleIn1-eN嵌层超晶格势垒层,其中0.10< 1Ee; e≦̸ 0.99。 AlInInGaGa1-f-gN泄漏抑制层位于AleIn1-eN阻挡层上,其中0.1≦̸ f≦̸ 0.99和0.1≦̸ g≦̸ 0.99,其中泄漏抑制层降低泄漏电流并增加高压操作期间的击穿电压。 在AlfIngGa1-f-gN泄漏抑制层上,优选具有金属电极的上层结构。

    Multilayer barrier III-nitride transistor for high voltage electronics
    7.
    发明授权
    Multilayer barrier III-nitride transistor for high voltage electronics 有权
    用于高压电子器件的多层势垒III族氮化物晶体管

    公开(公告)号:US08541817B2

    公开(公告)日:2013-09-24

    申请号:US12941332

    申请日:2010-11-08

    IPC分类号: H01L29/66

    摘要: An improved high breakdown voltage semiconductor device and method for manufacturing is provided. The device has a substrate and a AlaGa1-aN layer on the substrate wherein 0.1≦a≦1.00. A GaN layer is on the AlaGa1-aN layer. An In1-bGabN/GaN channel layer is on the GaN layer wherein 0.1≦b≦1.00. A AlcIndGa1-c-dN spacer layer is on the In1-bGabN/GaN layer wherein 0.1≦c≦1.00 and 0.0≦d≦0.99. A AleIn1-eN nested superlattice barrier layer is on the AlcIndGa1-c-dN spacer layer wherein 0.10≦e≦0.99. A AlfIngGa1-f-gN leakage suppression layer is on the AleIn1-eN barrier layer wherein 0.1≦f≦0.99 and 0.1≦g≦0.99 wherein the leakage suppression layer decreases leakage current and increases breakdown voltage during high voltage operation. A superstructure, preferably with metallic electrodes, is on the AlfIngGa1-f-gN leakage suppression layer.

    摘要翻译: 提供了一种改进的高击穿电压半导体器件及其制造方法。 该器件在衬底上具有衬底和AlaGa1-aN层,其中0.1 @ a @ 1.00。 Ala层在AlaGa1-aN层上。 In 1-bGabN / GaN沟道层位于GaN层上,其中0.1 @ b @ 1.00。 AlcIndGa1-c-dN间隔层位于In1-bGabN / GaN层上,其中0.1 @ c @ 1.00和0.0 @ d @ 0.99。 AlInInGa1-c-dN间隔层上的AleIn1-eN嵌层超晶格势垒层,其中0.10 @ e @ 0.99。 AlInInGaGa1-f-gN泄漏抑制层位于AleIn1-eN阻挡层上,其中0.1 @ f @ 0.99和0.1 @ g @ 0.99,其中泄漏抑制层降低泄漏电流并增加高电压操作期间的击穿电压。 在AlfIngGa1-f-gN泄漏抑制层上,优选具有金属电极的上层结构。

    ULTRAVIOLET LIGHT EMITTING DIODE WITH AC VOLTAGE OPERATION
    8.
    发明申请
    ULTRAVIOLET LIGHT EMITTING DIODE WITH AC VOLTAGE OPERATION 有权
    具有交流电压运行的超紫外线发光二极管

    公开(公告)号:US20110073838A1

    公开(公告)日:2011-03-31

    申请号:US12997240

    申请日:2009-06-06

    IPC分类号: H01L33/06

    摘要: Ultraviolet light emitting illuminator, and method for fabricating same, comprises an array of ultraviolet light emitting diodes and a first and a second terminal. When an alternating current is applied across the first and second terminals and thus to each of the diodes, the illuminator emits ultraviolet light at a frequency corresponding to that of the alternating current. The illuminator includes a template with ultraviolet light emitting quantum wells, a first buffer layer with a first type of conductivity and a second buffer layer with a second type of conductivity, all deposited preferably over a strain-relieving layer. A first and second metal contact are applied to the semiconductor layers having the first and second type of conductivity, respectively, to complete the LED. The emission spectrum ranges from 190 nm to 369 nm. The illuminator may be configured in various materials, geometries, sizes and designs.

    摘要翻译: 紫外线发光照明器及其制造方法包括紫外发光二极管阵列和第一和第二终端阵列。 当跨越第一和第二端子以及因此施加到每个二极管的交流电时,照明器以与交流电流相对应的频率发射紫外光。 照明器包括具有紫外光发射量子阱的模板,具有第一类型导电性的第一缓冲层和具有第二导电类型的第二缓冲层,所有这些均优选沉积在应变消除层上。 将第一和第二金属接触分别施加到具有第一和第二导电类型的半导体层以完成LED。 发射光谱范围为190nm至369nm。 照明器可以被配置成各种材料,几何形状,尺寸和设计。

    Selectively area regrown III-nitride high electron mobility transistor
    9.
    发明授权
    Selectively area regrown III-nitride high electron mobility transistor 有权
    选择性区域再生长的III族氮化物高电子迁移率晶体管

    公开(公告)号:US09343563B2

    公开(公告)日:2016-05-17

    申请号:US14450592

    申请日:2014-08-04

    摘要: Methods for forming a HEMT device are provided. The method includes forming an ultra-thin barrier layer on the plurality of thin film layers. A dielectric thin film layer is formed over a portion of the ultra-thin barrier layer to leave exposed areas of the ultra-thin barrier layer. A SAG S-D thin film layer is formed over the exposed areas of the ultra-thin barrier layer while leaving the dielectric thin film layer exposed. The dielectric thin film layer is then removed to expose the underlying ultra-thin barrier layer. The underlying ultra-thin barrier layer is treating with fluorine to form a treated area. A source and drain is added on the SAG S-D thin film layer, and a dielectric coating is deposited over the ultra-thin barrier layer treated with fluorine such that the dielectric coating is positioned between the source and the drain.

    摘要翻译: 提供了形成HEMT器件的方法。 该方法包括在多个薄膜层上形成超薄势垒层。 在超薄阻挡层的一部分上形成电介质薄膜层以留下超薄势垒层的暴露区域。 在超薄阻挡层的暴露区域上形成SAG S-D薄膜层,同时露出电介质薄膜层。 然后去除电介质薄膜层以暴露下面的超薄势垒层。 下面的超薄阻挡层用氟处理以形成处理区域。 在SAG S-D薄膜层上添加源极和漏极,并且在用氟处理的超薄势垒层上沉积电介质涂层,使得介电涂层位于源极和漏极之间。