公开(公告)号：US20060148232A1

公开(公告)日：2006-07-06

申请号：US11291383

申请日：2005-11-30

申请人： Kyung-Lak Lee ,  Ju-Il Lee

发明人： Kyung-Lak Lee ,  Ju-Il Lee

IPC分类号： H01L21/44 ,  H01L21/461

CPC分类号： H01L27/1469 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/00014

摘要： A method for fabricating a module of a semiconductor chip is provided. The method includes the steps of: forming a bump on a substrate provided with a pad; forming a protection layer over the bump; performing a grinding process on a rear surface of the substrate to reduce a thickness of the substrate; and exposing the bump by removing the protection layer.

摘要翻译： 提供一种制造半导体芯片的模块的方法。 该方法包括以下步骤：在设置有垫的基板上形成凸块; 在凸起上形成保护层; 在基板的后表面上进行研磨处理以减小基板的厚度; 并通过去除保护层来暴露凸块。

公开(公告)号：US07348262B2

公开(公告)日：2008-03-25

申请号：US11291383

申请日：2005-11-30

申请人： Kyung-Lak Lee ,  Ju-Il Lee

发明人： Kyung-Lak Lee ,  Ju-Il Lee

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L27/1469 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/00014

摘要： A method for fabricating a module of a semiconductor chip is provided. The method includes the steps of: forming a bump on a substrate provided with a pad; forming a protection layer over the bump; performing a grinding process on a rear surface of the substrate to reduce a thickness of the substrate; and exposing the bump by removing the protection layer.

摘要翻译： 提供一种制造半导体芯片的模块的方法。 该方法包括以下步骤：在设置有垫的基板上形成凸块; 在凸起上形成保护层; 在基板的后表面上进行研磨处理以减小基板的厚度; 并通过去除保护层来暴露凸块。

公开(公告)号：US07358552B2

公开(公告)日：2008-04-15

申请号：US11236047

申请日：2005-09-26

申请人： Ju-Il Lee

发明人： Ju-Il Lee

IPC分类号： H01L31/062

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14643 ,  H01L27/14689

摘要： A complementary metal-oxide-semiconductor (CMOS) image sensor and a method for fabricating the same are provided. The CMOS image sensor includes: a pixel region provided with a plurality of unit pixels, each including a buried photodiode and a floating diffusion region; and a logic region provided with CMOS devices for processing data outputted from the unit pixels, wherein a self-aligned silicide layer is formed on gate electrodes and source/drain regions of the CMOS devices in the logic region while a self-aligned silicide blocking layer is formed over the pixel region.

摘要翻译： 提供互补金属氧化物半导体（CMOS）图像传感器及其制造方法。 CMOS图像传感器包括：具有多个单位像素的像素区域，每个像素区域包括掩埋光电二极管和浮动扩散区域; 以及设置有用于处理从单位像素输出的数据的CMOS器件的逻辑区域，其中自对准硅化物层形成在逻辑区域中的CMOS器件的栅极电极和源极/漏极区域上，而自对准硅化物阻挡层 形成在像素区域上。

公开(公告)号：US08629023B2

公开(公告)日：2014-01-14

申请号：US13424957

申请日：2012-03-20

申请人： Ju-Il Lee

发明人： Ju-Il Lee

IPC分类号： H01L21/00

CPC分类号： H01L27/14689 ,  H01L27/14609

摘要： A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 Å to 90 Å; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 Å to 40 Å.

摘要翻译： 一种制造CMOS图像传感器的方法，包括：通过外延生长半导体衬底的上部来制备其中并入有p型外延层的半导体衬底; 在所述半导体衬底的一个预定位置中形成像素阵列，所述像素阵列具有多个晶体管和其中的光电二极管，其中每个晶体管采用厚度范围从-40到90的栅极绝缘体; 以及在所述半导体衬底的另一个预定位置中形成逻辑电路，所述逻辑电路具有至少一个晶体管，其中所述晶体管采用厚度范围为从...的栅极绝缘体。

公开(公告)号：US08163591B2

公开(公告)日：2012-04-24

申请号：US12956975

申请日：2010-11-30

申请人： Sung-Hyung Park ,  Ju-Il Lee

发明人： Sung-Hyung Park ,  Ju-Il Lee

IPC分类号： H01L21/00

CPC分类号： H01L27/14603 ,  H01L27/14629 ,  H01L27/1464

摘要： A backside illuminated image sensor includes a photodiode, formed below the top surface of a semiconductor substrate, for receiving light illuminated from the backside of the semiconductor substrate to generate photoelectric charges, a reflecting gate, formed on the photodiode over the front upper surface of the semiconductor substrate, for reflecting light illuminated from the backside of the substrate and receiving a bias to control a depletion region of the photodiode, and a transfer gate for transferring photoelectric charges from the photodiode to a sensing node of a pixel.

摘要翻译： 背面照明图像传感器包括形成在半导体衬底的顶表面下方的光电二极管，用于接收从半导体衬底的背面照射的光以产生光电电荷;反射门，形成在光电二极管的上表面上 半导体衬底，用于反射从衬底的背面照射的光并接收偏置以控制光电二极管的耗尽区;以及传输门，用于将光电荷从光电二极管传送到像素的感测节点。

公开(公告)号：US08143626B2

公开(公告)日：2012-03-27

申请号：US12723409

申请日：2010-03-12

申请人： Ju-Il Lee

发明人： Ju-Il Lee

IPC分类号： H01L31/113

CPC分类号： H01L27/14689 ,  H01L27/14609

摘要： A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 Å to 90 Å; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 Å to 40 Å.

摘要翻译： 一种制造CMOS图像传感器的方法，包括：通过外延生长半导体衬底的上部来制备其中并入有p型外延层的半导体衬底; 在所述半导体衬底的一个预定位置中形成像素阵列，所述像素阵列具有多个晶体管和其中的光电二极管，其中每个晶体管采用厚度范围从-40到90的栅极绝缘体; 以及在所述半导体衬底的另一个预定位置中形成逻辑电路，所述逻辑电路具有至少一个晶体管，其中所述晶体管采用厚度范围为从...的栅极绝缘体。

公开(公告)号：US20070120159A1

公开(公告)日：2007-05-31

申请号：US11657908

申请日：2007-01-24

申请人： Ju-Il Lee

发明人： Ju-Il Lee

IPC分类号： H01L31/113 ,  H01L21/00

CPC分类号： H01L27/14689 ,  H01L27/14609

摘要： A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 Å to 90 Å; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 Å to 40 Å.

摘要翻译： 一种制造CMOS图像传感器的方法，包括：通过外延生长半导体衬底的上部来制备其中并入有p型外延层的半导体衬底; 在所述半导体衬底的一个预定位置中形成像素阵列，所述像素阵列具有多个晶体管和其中的光电二极管，其中每个晶体管采用厚度范围从-40到90的栅极绝缘体; 以及在所述半导体衬底的另一个预定位置中形成逻辑电路，所述逻辑电路具有至少一个晶体管，其中所述晶体管采用厚度范围为从...的栅极绝缘体。

公开(公告)号：US06835590B2

公开(公告)日：2004-12-28

申请号：US10218931

申请日：2002-08-14

申请人： Ju-Il Lee

发明人： Ju-Il Lee

IPC分类号： H01L2100

CPC分类号： H01L27/14689 ,  H01L21/31051 ,  H01L21/76819 ,  H01L27/14609 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14698

摘要： The disclosed method provides a method capable of removing dangling bonds generated on a surface of photodiode. The method includes steps of: forming a photodiode in a semiconductor substrate; forming a transfer transistor, a reset transistor, a drive transistor and a select transistor on the semiconductor substrate; forming a first interlayer insulating layer on the semiconductor substrate, wherein the first interlayer insulating layer contains hydrogen ions; forming a second interlayer insulating layer on the first interlayer insulating layer; and flattening the second interlayer insulating layer by flowing and simultaneously diffusing the hydrogen ions into a surface of the photodiode.

摘要翻译： 所公开的方法提供了能够去除在光电二极管的表面上产生的悬挂键的方法。 该方法包括以下步骤：在半导体衬底中形成光电二极管; 在半导体衬底上形成转移晶体管，复位晶体管，驱动晶体管和选择晶体管; 在所述半导体衬底上形成第一层间绝缘层，其中所述第一层间绝缘层包含氢离子; 在所述第一层间绝缘层上形成第二层间绝缘层; 并且通过流动并同时将氢离子扩散到光电二极管的表面来使第二层间绝缘层变平。

公开(公告)号：US20120178206A1

公开(公告)日：2012-07-12

申请号：US13424957

申请日：2012-03-20

申请人： Ju-Il Lee

发明人： Ju-Il Lee

IPC分类号： H01L31/18

CPC分类号： H01L27/14689 ,  H01L27/14609

摘要： A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 Å to 90 Å; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 Å to 40 Å.

摘要翻译： 一种制造CMOS图像传感器的方法，包括：通过外延生长半导体衬底的上部来制备其中并入有p型外延层的半导体衬底; 在所述半导体衬底的一个预定位置中形成像素阵列，所述像素阵列具有多个晶体管和其中的光电二极管，其中每个晶体管采用厚度范围从-40到90的栅极绝缘体; 以及在所述半导体衬底的另一个预定位置中形成逻辑电路，所述逻辑电路具有至少一个晶体管，其中所述晶体管采用厚度范围为从...的栅极绝缘体。

公开(公告)号：US07691663B2

公开(公告)日：2010-04-06

申请号：US11657908

申请日：2007-01-24

申请人： Ju-Il Lee

发明人： Ju-Il Lee

IPC分类号： H01L21/00

CPC分类号： H01L27/14689 ,  H01L27/14609

摘要： A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 Å to 90 Å; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 Å to 40 Å.

摘要翻译： 一种制造CMOS图像传感器的方法，包括：通过外延生长半导体衬底的上部来制备其中并入有p型外延层的半导体衬底; 在所述半导体衬底的一个预定位置中形成像素阵列，所述像素阵列具有多个晶体管和其中的光电二极管，其中每个晶体管采用厚度范围从-40到90的栅极绝缘体; 以及在所述半导体衬底的另一个预定位置中形成逻辑电路，所述逻辑电路具有至少一个晶体管，其中所述晶体管采用厚度范围为从...的栅绝缘体。