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    Memory bus address snooper logic for determining memory activity without performing memory accesses
    1.
    发明授权
    Memory bus address snooper logic for determining memory activity without performing memory accesses 失效
    用于在不执行存储器访问的情况下确定存储器活动的存储器总线地址窥探逻辑

    公开(公告)号：US5901326A

    公开(公告)日：1999-05-04

    申请号：US756447

    申请日：1996-11-26

    申请人： Kevin J. Gildea ,  Peter Heiner Hochschild ,  Peter K. Szwed

    发明人： Kevin J. Gildea ,  Peter Heiner Hochschild ,  Peter K. Szwed

    IPC分类号： G06F13/42 ,  G06F13/00 ,  G06F13/14 ,  G06F15/16

    CPC分类号： G06F13/4243

    摘要： A parallel multiprocessor data processing system having a plurality of nodes for processing data and a switch connected to each of said nodes for switching messages between the nodes, each node having a node processor for defining messages under program control to be sent to another node. Each of the nodes has an I/O processor for controlling the sending of messages to another node via the switch, and a shared memory which can be accessed by both the node processor and the I/O processor. Instructions for the messages to be sent by the I/O processor are stored in mailboxes in the shared memory by the node processor. A comparing circuit compares addresses on the bus to the contents of a plurality of address registers and sets the corresponding bit in a results register for each match. The adapter processor reads the contents of the results register such that the adapter processor may, with a single bus access, determine all mailboxes that have been accessed by the node processor.

    摘要翻译： 一种并行多处理器数据处理系统，具有用于处理数据的多个节点和连接到每个所述节点的交换机，用于在节点之间切换消息，每个节点具有用于定义程序控制下的消息以发送到另一个节点的节点处理器。 每个节点具有用于控制经由交换机将消息发送到另一个节点的I / O处理器，以及可由节点处理器和I / O处理器访问的共享存储器。 由I / O处理器发送的消息的说明由节点处理器存储在共享存储器中的邮箱中。 比较电路将总线上的地址与多个地址寄存器的内容进行比较，并为每个匹配设置结果寄存器中的相应位。 适配器处理器读取结果寄存器的内容，使得适配器处理器可以通过单个总线访问来确定节点处理器已经访问的所有邮箱。

    ERROR RECOVERY IN REDUNDANT STORAGE SYSTEMS
    5.
    发明申请
    ERROR RECOVERY IN REDUNDANT STORAGE SYSTEMS 审中-公开
    冗余存储系统中的错误恢复

    公开(公告)号：US20130339784A1

    公开(公告)日：2013-12-19

    申请号：US13524719

    申请日：2012-06-15

    申请人： Craig A. Bickelman ,  Brian Bowles ,  David D. Cadigan ,  Edward W. Chencinski ,  Robert E. Galbraith ,  Adam J. McPadden ,  Kenneth J. Oakes ,  Peter K. Szwed

    发明人： Craig A. Bickelman ,  Brian Bowles ,  David D. Cadigan ,  Edward W. Chencinski ,  Robert E. Galbraith ,  Adam J. McPadden ,  Kenneth J. Oakes ,  Peter K. Szwed

    IPC分类号： G06F11/14

    CPC分类号： G06F11/1092 ,  G06F11/2082

    摘要： Embodiments relate to providing error recovery in a storage system that utilizes data redundancy. An aspect of the invention includes monitoring plurality of storage devices of the storage system and determining that one of the plurality of storage devices has failed based on the monitoring. Another aspect of includes suspending data reads and writes to the failed storage device and determining that the failed storage device is recoverable. Based on determining that the failed storage device is recoverable, initiating a rebuilding recovery process of the failed storage device based on determining that the failed storage device is recoverable and restoring data reads and writes to the failed storage device upon completion of the rebuilding recovery process.

    摘要翻译： 实施例涉及在利用数据冗余的存储系统中提供错误恢复。 本发明的一个方面包括监视存储系统的多个存储设备，并且基于监视来确定多个存储设备中的一个存储设备已经发生故障。 另一方面包括暂停对故障存储设备的数据读写，并确定故障存储设备是可恢复的。 基于确定故障存储设备是可恢复的，基于确定故障存储设备是可恢复的，启动故障存储设备的重建恢复过程，并且在重建恢复过程完成时恢复对故障存储设备的数据读取和写入。