NOZZLE DEVICE AND PROCESSING APPARATUS
    2.
    发明申请

    公开(公告)号:US20170259278A1

    公开(公告)日:2017-09-14

    申请号:US15124005

    申请日:2015-09-09

    IPC分类号: B05B1/14 B05B1/30

    摘要: A nozzle device according to an embodiment includes a first opening, a plurality of second openings, and a first duct part. The first duct part includes at least one first branching part having a first part extending in a first direction and a plurality of second parts connected to a first end of the first part and extending in respective directions intersecting with the first direction. The first duct part connects the first opening and the second openings and is branched at least once by the first branching part in a path extending from the first opening to the second openings. The path lengths and the numbers of first branching parts between the first opening and the respective second openings are the same. The cross-sectional area of the first end of the first part is smaller than the cross-sectional area of a second end of the first part.

    SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 审中-公开
    半导体存储器件

    公开(公告)号:US20170069654A1

    公开(公告)日:2017-03-09

    申请号:US15011911

    申请日:2016-02-01

    IPC分类号: H01L27/115

    摘要: A semiconductor memory device according to an embodiment includes a substrate, a stacked body provided on the substrate, a plurality of electrode films being stacked to be separated from each other in the stacked body, a semiconductor pillar piercing the plurality of electrode films, a first insulating film provided between the semiconductor pillar and the electrode films, a second insulating film provided between the semiconductor pillar and the first insulating film; and a third insulating film provided between the first insulating film and the electrode films. The first insulating film includes silicon, nitrogen, oxygen, and carbon.

    摘要翻译: 根据实施例的半导体存储器件包括衬底,设置在衬底上的层叠体,堆叠在堆叠体中彼此分离的多个电极膜,穿透多个电极膜的半导体柱,第一 设置在所述半导体柱和所述电极膜之间的绝缘膜,设置在所述半导体柱和所述第一绝缘膜之间的第二绝缘膜; 以及设置在所述第一绝缘膜和所述电极膜之间的第三绝缘膜。 第一绝缘膜包括硅,氮,氧和碳。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号:US20160343657A1

    公开(公告)日:2016-11-24

    申请号:US14827512

    申请日:2015-08-17

    摘要: According to one embodiment, a semiconductor device includes a stacked body, a core film, and a stacked film. The stacked body includes a plurality of conductive layers stacked with an insulating layer between the conductive layers. The core film extends in the stacked body in a stacking direction of the stacked body, and includes a metal oxide film having a higher dielectric constant than a dielectric constant of silicon nitride. The stacked film includes a semiconductor film and charge storage film. The semiconductor film is provided between the conductive layers and the core film. The semiconductor film extends in the stacking direction. The charge storage film is provided between the conductive layers and the semiconductor film.

    摘要翻译: 根据一个实施例,半导体器件包括层叠体,芯膜和层叠膜。 层叠体包括在导电层之间堆叠有绝缘层的多个导电层。 芯膜在堆叠体的堆叠方向上在堆叠体中延伸,并且包括具有比介电常数高的氮化硅的介电常数的金属氧化物膜。 层叠膜包括半导体膜和电荷存储膜。 半导体膜设置在导电层和芯膜之间。 半导体膜沿层叠方向延伸。 电荷存储膜设置在导电层和半导体膜之间。

    Non-Volatile Memory Device and Method for Manufacturing Same
    5.
    发明申请
    Non-Volatile Memory Device and Method for Manufacturing Same 审中-公开
    非易失性存储器件及其制造方法

    公开(公告)号:US20160071948A1

    公开(公告)日:2016-03-10

    申请号:US14636338

    申请日:2015-03-03

    摘要: According to a nonvolatile memory device including a semiconductor layer, a control electrode, a memory layer provided between the semiconductor layer and the control electrode, a first insulating film provided between the semiconductor layer and the memory layer, and a second insulating film provided between the control electrode and the memory layer. The second insulating film includes a metal oxide having a monoclinic structure.

    摘要翻译: 根据包括半导体层,控制电极,设置在半导体层和控制电极之间的存储层的非易失性存储器件,设置在半导体层和存储层之间的第一绝缘膜,以及设置在半导体层和控制电极之间的第二绝缘膜 控制电极和存储层。 第二绝缘膜包括具有单斜晶体结构的金属氧化物。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND PRODUCTION METHOD FOR THE SAME
    6.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND PRODUCTION METHOD FOR THE SAME 审中-公开
    非易失性半导体存储器件及其制造方法

    公开(公告)号:US20150048436A1

    公开(公告)日:2015-02-19

    申请号:US14526593

    申请日:2014-10-29

    发明人: Masayuki TANAKA

    摘要: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor substrate; an element isolation insulating film buried in the semiconductor substrate so as to isolate adjacent element; a memory cell having a first insulating film and a charge accumulation film; a second insulating film formed on the charge accumulation films of the memory cells and the element isolation insulating film; and a control electrode film formed on the second insulating film. An upper surface of the element isolation insulating film is lower than an upper surface of the charge accumulation film, the second insulating film is provided with a cell upper portion on the charge accumulation film and an inter-cell portion on the element isolation insulating film, and a dielectric constant of the cell upper portion is lower than a dielectric constant of the inter-cell portion.

    摘要翻译: 根据一个实施例,非易失性半导体存储器件包括半导体衬底; 埋置在半导体衬底中以隔离相邻元件的元件隔离绝缘膜; 具有第一绝缘膜和电荷累积膜的存储单元; 形成在存储单元的电荷累积膜和元件隔离绝缘膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制电极膜。 元件隔离绝缘膜的上表面低于电荷累积膜的上表面,第二绝缘膜在电荷累积膜上设置有单元上部,在元件隔离绝缘膜上设置单元间部分, 并且单元上部的介电常数低于单元间部分的介电常数。

    PROCESSING METHOD, PROCESSING DEVICE, AND NON-TRANSITORY STORAGE MEDIUM

    公开(公告)号:US20220388794A1

    公开(公告)日:2022-12-08

    申请号:US17652763

    申请日:2022-02-28

    发明人: Masayuki TANAKA

    IPC分类号: B65H5/06 B65H7/02 B65H3/06

    摘要: According to an embodiment, a processing method simulates conveyance of at least one web sheet conveyed in a conveying direction along a conveyance path from an unwinder to a winder. The processing method sets a conveyance velocity along the conveying direction as a velocity of a distal end node, which is an analysis node located at a distal end of the web sheet in the conveying direction. After setting the conveyance velocity to the distal end node, the distal end node is deleted based on a movement of the distal end node by a prescribed distance. The processing method updates the distal end node to an analysis node newly located at a distal end of the web sheet based on the deletion of the distal end node.

    FLOW PASSAGE STRUCTURE AND PROCESSING APPARATUS

    公开(公告)号:US20200232095A1

    公开(公告)日:2020-07-23

    申请号:US15757382

    申请日:2017-06-26

    IPC分类号: C23C16/455

    摘要: According to an embodiment, a flow passage structure includes a member. The member has a surface and is provided with a first passage, a plurality of first openings, a second passage, and a plurality of second openings. The first passage includes a plurality of first closed path portions connected to each other. The first openings is connected to the first passage and is opened in the surface. The second passage includes a plurality of second closed path portions connected to each other. The second openings is connected to the second passage and is opened in the surface. The first closed path portions pass through the second closed path portions while being isolated from the second closed path portions. The second closed path portions pass through the first closed path portions while being isolated from the first closed path portions.