公开(公告)号：US10778925B2

公开(公告)日：2020-09-15

申请号：US16439297

申请日：2019-06-12

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/956 ,  H04N5/361 ,  H04N5/372 ,  H01L27/148 ,  G01N21/95 ,  G06T7/00

Abstract: A multiple-column-per-channel image CCD sensor utilizes a multiple-column-per-channel readout circuit including connected transfer gates that alternately transfer pixel data (charges) from a group of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at multiple times the line clock rate to pass the image charges to the shared output circuit. A symmetrical fork-shaped diffusion is utilized in one embodiment to merge the image charges from the group of related pixel columns. A method of driving the multiple-column-per-channel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the multiple-column-per-channel CCD sensor is also described.

公开(公告)号：US20190253652A1

公开(公告)日：2019-08-15

申请号：US16397072

申请日：2019-04-29

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/956 ,  H04N5/361 ,  H04N5/372 ,  G06T7/00 ,  H01L27/148 ,  G01N21/95

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

公开(公告)号：US10313622B2

公开(公告)日：2019-06-04

申请号：US15337604

申请日：2016-10-28

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/95 ,  G06T7/00 ,  H01L27/148 ,  H04N5/372 ,  H04N5/361

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

公开(公告)号：US10764527B2

公开(公告)日：2020-09-01

申请号：US16397072

申请日：2019-04-29

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H01L27/148 ,  H04N5/378 ,  H04N5/361 ,  G01N21/956 ,  G01N21/95 ,  G06T7/00 ,  H04N5/372

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

公开(公告)号：US20190313044A1

公开(公告)日：2019-10-10

申请号：US16439297

申请日：2019-06-12

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/956 ,  H04N5/361 ,  H04N5/372 ,  G06T7/00 ,  H01L27/148 ,  G01N21/95

Abstract: A multiple-column-per-channel image CCD sensor utilizes a multiple-column-per-channel readout circuit including connected transfer gates that alternately transfer pixel data (charges) from a group of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at multiple times the line clock rate to pass the image charges to the shared output circuit. A symmetrical fork-shaped diffusion is utilized in one embodiment to merge the image charges from the group of related pixel columns. A method of driving the multiple-column-per-channel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the multiple-column-per-channel CCD sensor is also described.

公开(公告)号：US20170295334A1

公开(公告)日：2017-10-12

申请号：US15337604

申请日：2016-10-28

Applicant: KLA-Tencor Corporation

Inventor： Yung-Ho Alex Chuang ,  Jingjing Zhang ,  Sharon Zamek ,  John Fielden ,  Devis Contarato ,  David L. Brown

IPC: H04N5/378 ,  G01N21/95 ,  H01L27/148 ,  H04N5/372 ,  G06T7/00

CPC classification number: H04N5/378 ,  G01N21/9501 ,  G06T7/0008 ,  G06T2207/30148 ,  H01L27/14812 ,  H01L27/14825 ,  H04N5/361 ,  H04N5/372

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.