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公开(公告)号：US10036964B2
公开(公告)日：2018-07-31
申请号：US14656422
申请日：2015-03-12
Applicant: KLA-Tencor Corporation
Inventor： Bin-Ming Benjamin Tsai , Oreste Donzella , Pradeep Vukkadala , Jaydeep Sinha
CPC classification number: G03F7/707 , G03F7/70783
Abstract: Prediction based systems and methods for optimizing wafer chucking and lithography control are disclosed. Distortions predicted to occur when a wafer is chucked by a chucking device are calculated and are utilized to control chucking parameters of the chucking device. Chucking parameters may include chucking pressures and chucking sequences. In addition, predicted distortions may also be utilized to facilitate application of anticipatory corrections. Controlling chucking parameters and/or applying anticipatory corrections help reducing or minimizing overlay errors.
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公开(公告)号：US08832611B2
公开(公告)日：2014-09-09
申请号：US13919577
申请日：2013-06-17
Applicant: KLA-Tencor Corporation
Inventor： Xuefeng Liu , Yung-Ho Alex Chuang , John Fielden , Bin-Ming Benjamin Tsai , Jingjing Zhang
CPC classification number: G06F17/5018 , G03F7/70625 , G06F17/10 , G06F17/5081 , G06F19/00 , G06F2217/12 , G06F2217/14 , G06F2217/16 , H01L22/12 , H01L22/20
Abstract: Systems and methods for process aware metrology are provided. One method includes selecting nominal values and one or more different values of process parameters for one or more process steps used to form the structure on the wafer, simulating one or more characteristics of the structure that would be formed on the wafer using the nominal values, and determining parameterization of the optical model based on how the one or more characteristics of the structure vary between at least two of the nominal values and the one or more different values.
Abstract translation: 提供了流程感知度量的系统和方法。 一种方法包括为用于在晶片上形成结构的一个或多个工艺步骤选择工艺参数的标称值和一个或多个不同值，模拟使用标称值在晶片上形成的结构的一个或多个特性， 以及基于所述结构的一个或多个特性如何在所述标称值和所述一个或多个不同值中的至少两个之间变化来确定所述光学模型的参数化。
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公开(公告)号：US10788759B2
公开(公告)日：2020-09-29
申请号：US16049266
申请日：2018-07-30
Applicant: KLA-Tencor Corporation
Inventor： Bin-Ming Benjamin Tsai , Oreste Donzella , Pradeep Vukkadala , Jaydeep Sinha
Abstract: Prediction based systems and methods for optimizing wafer chucking and lithography control are disclosed. Distortions predicted to occur when a wafer is chucked by a chucking device are calculated and are utilized to control chucking parameters of the chucking device. Chucking parameters may include chucking pressures and chucking sequences. In addition, predicted distortions may also be utilized to facilitate application of anticipatory corrections. Controlling chucking parameters and/or applying anticipatory corrections help reducing or minimizing overlay errors.
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公开(公告)号：US20180364579A1
公开(公告)日：2018-12-20
申请号：US16049266
申请日：2018-07-30
Applicant: KLA-Tencor Corporation
Inventor： Bin-Ming Benjamin Tsai , Oreste Donzella , Pradeep Vukkadala , Jaydeep Sinha
IPC: G03F7/20
CPC classification number: G03F7/707 , G03F7/70783
Abstract: Prediction based systems and methods for optimizing wafer chucking and lithography control are disclosed. Distortions predicted to occur when a wafer is chucked by a chucking device are calculated and are utilized to control chucking parameters of the chucking device. Chucking parameters may include chucking pressures and chucking sequences. In addition, predicted distortions may also be utilized to facilitate application of anticipatory corrections. Controlling chucking parameters and/or applying anticipatory corrections help reducing or minimizing overlay errors.
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5.发明授权EUV high throughput inspection system for defect detection on patterned EUV masks, mask blanks, and wafers 有权EUV高通量检测系统，用于在图案化的EUV掩模，掩模毛坯和晶片上进行缺陷检测公开(公告)号：US08692986B2
公开(公告)日：2014-04-08
申请号：US14014142
申请日：2013-08-29
Applicant: KLA-Tencor Corporation
Inventor： Yung-Ho Chuang , Richard W. Solarz , David R. Shafer , Bin-Ming Benjamin Tsai , David L. Brown
IPC: G01N21/00
CPC classification number: G01N21/95 , G01N21/8806 , G01N21/9501 , G01N21/956 , G01N2021/95676 , G01N2201/068 , G03F1/84 , G03F7/70616 , H05G2/008
Abstract: Inspection of EUV patterned masks, blank masks, and patterned wafers generated by EUV patterned masks requires high magnification and a large field of view at the image plane. An EUV inspection system can include a light source directed to an inspected surface, a detector for detecting light deflected from the inspected surface, and an optic configuration for directing the light from the inspected surface to the detector. In particular, the detector can include a plurality of sensor modules. Additionally, the optic configuration can include a plurality of mirrors that provide magnification of at least 100× within an optical path less than 5 meters long. In one embodiment, the optical path is approximately 2-3 meters long.
Abstract translation: 对EUV图案化掩模，空白掩模和由EUV图案化掩模生成的图案化晶片的检查需要高倍率和在图像平面上的大视场。 EUV检查系统可以包括指向检查表面的光源，用于检测从被检查表面偏转的光的检测器和用于将来自被检查表面的光引导到检测器的光学配置。 特别地，检测器可以包括多个传感器模块。 另外，光学配置可以包括在小于5米长的光路内提供至少100倍的放大倍数的多个反射镜。 在一个实施例中，光路大约2-3米长。
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Patent Agency Ranking
公开(公告)号：US20160239600A1
公开(公告)日：2016-08-18
申请号：US14656422
申请日：2015-03-12
Applicant: KLA-Tencor Corporation
Inventor： Bin-Ming Benjamin Tsai , Oreste Donzella , Pradeep Vukkadala , Jaydeep Sinha
IPC: G06F17/50
CPC classification number: G03F7/707 , G03F7/70783
Abstract: Prediction based systems and methods for optimizing wafer chucking and lithography control are disclosed. Distortions predicted to occur when a wafer is chucked by a chucking device are calculated and are utilized to control chucking parameters of the chucking device. Chucking parameters may include chucking pressures and chucking sequences. In addition, predicted distortions may also be utilized to facilitate application of anticipatory corrections. Controlling chucking parameters and/or applying anticipatory corrections help reducing or minimizing overlay errors.
Abstract translation: 公开了用于优化晶片夹持和光刻控制的基于预测的系统和方法。 计算出当通过夹紧装置夹紧晶片时发生的变形，并用于控制夹紧装置的夹持参数。 夹头参数可以包括夹紧压力和夹紧顺序。 此外，还可以利用预测的失真来促进预期校正的应用。 控制夹持参数和/或应用预期校正有助于减少或最小化重叠错误。
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公开(公告)号：US08962351B1
公开(公告)日：2015-02-24
申请号：US14021593
申请日：2013-09-09
Applicant: KLA-Tencor Corporation
Inventor： Alex Salnik , Bin-Ming Benjamin Tsai , Lena Nicolaides
IPC: H01L21/66 , G01R31/26 , G01N21/95 , H01L21/265
CPC classification number: H01L22/10 , G01N21/9501 , G01R31/2601 , H01L21/265 , H01L22/12 , H01L22/20
Abstract: The present invention may include a first dopant metrology system configured to measure a first plurality of values of at least one parameter of a wafer, an ion implanter configured to implant a plurality of ions into the wafer, a second dopant metrology system configured to measure a second plurality of values of at least one parameter of the wafer following ion implantation of the wafer by the implanter, wherein the first dopant metrology system and the second dopant metrology system are communicatively coupled, an annealer configured to anneal the wafer following ion implantation, and a third dopant metrology system configured to measure a third plurality of values of at least one parameter of the wafer following annealing of the wafer by the annealer, wherein the second dopant metrology system and the third dopant metrology system are communicatively coupled.
Abstract translation: 本发明可以包括配置成测量晶片的至少一个参数的第一多个值的第一掺杂剂计量系统，被配置成将多个离子注入到晶片中的离子注入机;配置成测量晶片的第二掺杂剂计量系统 其中所述第一掺杂剂计量系统和所述第二掺杂剂测量系统通信耦合，所述退火器被配置为在离子注入之后退火所述晶片，以及 第三掺杂剂测量系统，被配置为在由所述退火炉退火所述晶片之后测量所述晶片的至少一个参数的第三多个值，其中所述第二掺杂剂测量系统和所述第三掺杂剂计量系统通信地耦合。
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8.发明申请EUV High Throughput Inspection System For Defect Detection On Patterned EUV Masks, Mask Blanks, And Wafers 有权EUV高通量检测系统，用于在图案化的EUV面罩，面罩空白和晶圆上进行缺陷检测公开(公告)号：US20140217299A1
公开(公告)日：2014-08-07
申请号：US14242802
申请日：2014-04-01
Applicant: KLA-Tencor Corporation
Inventor： Yung-Ho Chuang , Richard W. Solarz , David R. Shafer , Bin-Ming Benjamin Tsai , David L. Brown
IPC: G01N21/95
CPC classification number: G01N21/95 , G01N21/8806 , G01N21/9501 , G01N21/956 , G01N2021/95676 , G01N2201/068 , G03F1/84 , G03F7/70616 , H05G2/008
Abstract: Inspection of EUV patterned masks, blank masks, and patterned wafers generated by EUV patterned masks requires high magnification and a large field of view at the image plane. An EUV inspection system can include a light source directed to an inspected surface, a detector for detecting light deflected from the inspected surface, and an optic configuration for directing the light from the inspected surface to the detector. In particular, the detector can include a plurality of sensor modules. Additionally, the optic configuration can include a plurality of mirrors that provide magnification of at least 100× within an optical path less than 5 meters long. In one embodiment, the optical path is approximately 2-3 meters long.
Abstract translation: 对EUV图案化掩模，空白掩模和由EUV图案化掩模生成的图案化晶片的检查需要高倍率和在图像平面上的大视场。 EUV检查系统可以包括指向检查表面的光源，用于检测从被检查表面偏转的光的检测器和用于将来自被检查表面的光引导到检测器的光学配置。 特别地，检测器可以包括多个传感器模块。 另外，光学配置可以包括在小于5米长的光路内提供至少100倍的放大倍数的多个反射镜。 在一个实施例中，光路大约2-3米长。
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公开(公告)号：US20140001370A1
公开(公告)日：2014-01-02
申请号：US14014142
申请日：2013-08-29
Applicant: KLA-Tencor Corporation
Inventor： Yung-Ho Chuang , Richard W. Solarz , David R. Shafer , Bin-Ming Benjamin Tsai , David L. Brown
IPC: G01N21/88
CPC classification number: G01N21/95 , G01N21/8806 , G01N21/9501 , G01N21/956 , G01N2021/95676 , G01N2201/068 , G03F1/84 , G03F7/70616 , H05G2/008
Abstract: Inspection of EUV patterned masks, blank masks, and patterned wafers generated by EUV patterned masks requires high magnification and a large field of view at the image plane. An EUV inspection system can include a light source directed to an inspected surface, a detector for detecting light deflected from the inspected surface, and an optic configuration for directing the light from the inspected surface to the detector. In particular, the detector can include a plurality of sensor modules. Additionally, the optic configuration can include a plurality of mirrors that provide magnification of at least 100× within an optical path less than 5 meters long. In one embodiment, the optical path is approximately 2-3 meters long.
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公开(公告)号：US20130282340A1
公开(公告)日：2013-10-24
申请号：US13919577
申请日：2013-06-17
Applicant: KLA-Tencor Corporation
Inventor： Xuefeng Liu , Yung-Ho Alex Chuang , John Fielden , Bin-Ming Benjamin Tsai , Jingjing Zhang
IPC: G06F17/50
CPC classification number: G06F17/5018 , G03F7/70625 , G06F17/10 , G06F17/5081 , G06F19/00 , G06F2217/12 , G06F2217/14 , G06F2217/16 , H01L22/12 , H01L22/20
Abstract: Systems and methods for process aware metrology are provided. One method includes selecting nominal values and one or more different values of process parameters for one or more process steps used to form the structure on the wafer, simulating one or more characteristics of the structure that would be formed on the wafer using the nominal values, and determining parameterization of the optical model based on how the one or more characteristics of the structure vary between at least two of the nominal values and the one or more different values.
Abstract translation: 提供了流程感知度量的系统和方法。 一种方法包括为用于在晶片上形成结构的一个或多个工艺步骤选择工艺参数的标称值和一个或多个不同值，模拟使用标称值在晶片上形成的结构的一个或多个特性， 以及基于所述结构的一个或多个特性如何在所述标称值和所述一个或多个不同值中的至少两个之间变化来确定所述光学模型的参数化。
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