公开(公告)号：US20120114086A1

公开(公告)日：2012-05-10

申请号：US13277701

申请日：2011-10-20

申请人： Junichi HAYASHI

发明人： Junichi HAYASHI

IPC分类号： H04L7/00

CPC分类号： G11C11/4076 ,  G11C5/025 ,  G11C5/063 ,  G11C11/408 ,  G11C11/4082 ,  G11C11/4087 ,  H01L2224/16145

摘要： A semiconductor device includes: an interface chip including a read timing control circuit that outputs, in response to a command signal and a clock signal supplied from the outside, a plurality of read control signals that are each in synchronization with the clock signal and have different timings; and core chips including a plurality of internal circuits that are stacked on the interface chip and each perform an operation indicated by the command signal in synchronization with the read control signals. According to the present invention, it is unnecessary to control latency in the core chips and therefore to supply the clock signal to the core chips.

摘要翻译： 半导体器件包括：接口芯片，包括读定时控制电路，其响应于来自外部的命令信号和时钟信号输出与时钟信号同步的多个读控制信号，并且具有不同的 时间 核心芯片包括堆叠在接口芯片上的多个内部电路，并且每个都与读取的控制信号同步地执行由命令信号指示的操作。 根据本发明，不需要控制核心芯片的等待时间，从而将时钟信号提供给核心芯片。

公开(公告)号：US20090029321A1

公开(公告)日：2009-01-29

申请号：US12179636

申请日：2008-07-25

申请人： Junichi HAYASHI ,  Michio ITO

发明人： Junichi HAYASHI ,  Michio ITO

IPC分类号： A61C13/00

CPC分类号： A61C13/01 ,  A61C8/0012 ,  A61C8/005 ,  A61C13/0003

摘要： A dental implant capable of reliably preventing elution of metal when the dental implant is applied within an oral cavity and capable of reliably preventing occurrence of mismatching (bumpy occlusion or the like) when the dental implant is fixed in place, and a method for manufacturing the dental implant are provided. In the method for manufacturing a dental implant including an abutment, the abutment is manufactured through the steps including a ceramic molded body production step for molding a ceramic molded body composition to obtain a ceramic molded body, an assembling step for assembling a titanium member and the ceramic molded body together to obtain an assembled body, a degreasing step for degreasing the assembled body so that the ceramic molded body is transformed into a ceramic degreased body, and a sintering step for sintering the assembled body to transform the ceramic degreased body into a ceramic member so that the ceramic member is firmly fixed to the titanium member.

摘要翻译： 一种牙科植入物，其能够在将牙科植入物涂敷在口腔内时能够可靠地防止金属溶出，并且能够可靠地防止当牙植入物固定就位时发生不匹配（颠簸堵塞等），以及制造方法 提供牙科植入物。 在用于制造包括基台的牙科植入物的方法中，通过以下步骤制造基台，所述步骤包括陶瓷成形体制造步骤，用于模制陶瓷成型体组合物以获得陶瓷成型体，组装钛构件的组装步骤和 陶瓷成型体一起获得组装体，用于使组装体脱脂的脱脂步骤，使得陶瓷成型体转变为陶瓷脱脂体，以及烧结步骤，用于烧结组装体以将陶瓷脱脂体转变成陶瓷 使得陶瓷构件牢固地固定在钛构件上。

公开(公告)号：US20140078848A1

公开(公告)日：2014-03-20

申请号：US14085440

申请日：2013-11-20

申请人： Junichi HAYASHI ,  Akira IDE

发明人： Junichi HAYASHI ,  Akira IDE

IPC分类号： G11C11/406

CPC分类号： G11C11/40615 ,  G11C5/04 ,  G11C8/12 ,  G11C11/401 ,  G11C11/406 ,  G11C29/025 ,  G11C29/028 ,  G11C29/12 ,  G11C29/50008 ,  G11C29/883

摘要： In one embodiment, a semiconductor memory device receives a refresh command and address information, and supplies a refresh control signal and the address information in common to core chips. Each of the core chips includes a layer-address comparison circuit that determines whether the address information assigns an own core chip, and a refresh control circuit that refreshes an own memory cell based on the refresh control signal when the address information assigns the own core chip. With this arrangement, a memory capacity of a chip that is refreshed by a refresh command for one time is reduced, and therefore a shortest issuing interval of a refresh command can be shortened.

摘要翻译： 在一个实施例中，半导体存储器件接收刷新命令和地址信息，并将刷新控制信号和地址信息共同地提供给核心芯片。 每个核心芯片包括层地址比较电路，其确定地址信息是否分配自己的核心芯片，以及刷新控制电路，当地址信息分配自己的核心芯片时，刷新控制电路基于刷新控制信号刷新自己的存储器单元 。 通过这种布置，减少了刷新命令一次刷新的芯片的存储器容量，因此可以缩短刷新命令的最短发布间隔。

公开(公告)号：US20090029318A1

公开(公告)日：2009-01-29

申请号：US12179913

申请日：2008-07-25

申请人： Junichi HAYASHI ,  Michio ITO

发明人： Junichi HAYASHI ,  Michio ITO

IPC分类号： A61C8/00

CPC分类号： A61C8/005 ,  A61C8/0012 ,  A61C13/0003

摘要： A dental implant capable of reliably preventing elution of metal when the dental implant is applied within an oral cavity and capable of reliably preventing occurrence of mismatching (bumpy occlusion or the like) when the dental implant is fixed in place, and a method for manufacturing the dental implant are provided. In the method for manufacturing a dental implant including an abutment, the abutment is manufactured through the steps including a titanium molded body production step for molding a titanium molded body composition to obtain a titanium molded body having one of male and female thread portions, a ceramic molded body production step for molding a ceramic molded body composition to obtain a ceramic molded body having the other thread portion which makes thread coupling with the one thread portion, an assembling step for assembling the titanium molded body and the ceramic molded body together so that the one thread portion makes thread coupling with the other thread portion, to obtain an assembled body, a degreasing step for degreasing the assembled body, and a sintering step for sintering the assembled body thus degreased.

摘要翻译： 一种牙科植入物，其能够在将牙科植入物涂敷在口腔内时能够可靠地防止金属溶出，并且能够可靠地防止当牙植入物固定就位时发生不匹配（颠簸堵塞等），以及制造方法 提供牙科植入物。 在用于制造包括基台的牙科植入物的方法中，通过包括用于模制钛成型体组合物的钛成型体制造步骤以获得具有阳螺纹部分和阴螺纹部分之一的钛成型体的步骤制造基台， 用于模制陶瓷成型体组合物的模制体生产步骤，以获得具有与一个螺纹部分进行螺纹联接的另一螺纹部分的陶瓷模制体，将钛模制体和陶瓷模制体组装在一起的组装步骤， 一个螺纹部分与另一个螺纹部分进行螺纹联接，以获得组装体，用于使组装体脱脂的脱脂步骤，以及用于烧结组装体的烧结步骤，从而脱脂。

公开(公告)号：US20140177367A1

公开(公告)日：2014-06-26

申请号：US14189896

申请日：2014-02-25

申请人： Junichi HAYASHI

发明人： Junichi HAYASHI

IPC分类号： G11C11/403 ,  H01L27/108

CPC分类号： G11C11/403 ,  G11C5/04 ,  G11C8/12 ,  H01L23/481 ,  H01L27/10897 ,  H01L2224/16145 ,  H01L2224/16225

摘要： A device includes a plurality of Dynamic Random Access Memory (DRAM) chips in a stacked configuration connected by through silicon vias (TSVs), and each of the plurality of DRAM chips being configured to provide a local bank active signal to indicate when any one of a plurality of banks on a respective one of the plurality of DRAM chips is active, and local bank active signals from the plurality of DRAM chips being supplied through TSVs of intervening ones of the plurality of DRAM chips to a lowermost one of the plurality of DRAM chips.

摘要翻译： 一种设备包括通过硅通孔（TSV）连接的堆叠配置中的多个动态随机存取存储器（DRAM）芯片，并且所述多个DRAM芯片中的每一个被配置为提供本地存储体活动信号以指示何时 所述多个DRAM芯片中的相应一个DRAM芯片上的多个存储体是有效的，并且来自所述多个DRAM芯片的局部存储体活动信号通过所述多个DRAM芯片中的所述DRAM芯片的TSV被提供给所述多个DRAM芯片中的最下面的DRAM 筹码

公开(公告)号：US20110314964A1

公开(公告)日：2011-12-29

申请号：US13168333

申请日：2011-06-24

申请人： Hideki ISHIGAMI ,  Masaaki SAKATA ,  Junichi HAYASHI ,  Hidefumi NAKAMURA

发明人： Hideki ISHIGAMI ,  Masaaki SAKATA ,  Junichi HAYASHI ,  Hidefumi NAKAMURA

IPC分类号： B22F1/00 ,  C08K5/01 ,  C08L23/06 ,  C08L33/14 ,  C08L25/06 ,  C08L23/12

CPC分类号： C08L25/06 ,  B22F1/0059 ,  B22F3/1025 ,  B22F2001/0066 ,  B22F2999/00 ,  C08K5/01 ,  C08K5/12 ,  C08L23/0869 ,  C08L23/08 ,  C08L91/06 ,  B22F2201/02 ,  B22F2201/11 ,  B22F2201/20

摘要： There is disclosed a compound for powder metallurgy including a binder composition for powder metallurgy and a metal powder. The binder composition for powder metallurgy includes a hydrocarbon-based resin and wax, wherein the content of oxygen is 20 mass % or less. The content of the hydrocarbon-based resin in the compound for powder metallurgy is 1 to 2 times the content of the wax, by mass ratio. It is preferable that the binder composition further includes a copolymer formed through a copolymerization of a first monomer including a cyclic ether group with a second monomer.

摘要翻译： 公开了一种粉末冶金化合物，包括粉末冶金用粘合剂组合物和金属粉末。 粉末冶金用粘合剂组合物包括烃类树脂和蜡，其中氧含量为20质量％以下。 粉末冶金用化合物中的烃系树脂的含量以质量比计为蜡的1〜2倍。 优选粘合剂组合物还包含通过包含环状醚基团的第一单体与第二单体的共聚而形成的共聚物。

公开(公告)号：US20090251183A1

公开(公告)日：2009-10-08

申请号：US12416504

申请日：2009-04-01

申请人： Junichi HAYASHI

发明人： Junichi HAYASHI

IPC分类号： H03L7/06

CPC分类号： H03L7/0814 ,  G11C7/22 ,  G11C7/222 ,  H03K5/135

摘要： A simple circuit for preventing occurrence of a hazard and output delay for an asynchronous input signal in a clock signal. A flip-flop circuit (FF) outputs an output signal at a low level to a clocked inverter circuit (INVO) when a clock signal (PCLKB) transitions from a high level to a low level after an enabling signal (ENAT) goes to a high level. The clocked inverter circuit (INVO) is active when the clock signal (PCLKB) is at a low level, and inverts an output signal of the flip-flop circuit (FF) and outputs the output signal to a holding circuit (LATCH). The holding circuit (LATCH) holds the output signal of the clocked inverter circuit (INVO) and outputs the output signal as a signal (ENAOUT).

摘要翻译： 用于防止在时钟信号中产生异步输入信号的危险和输出延迟的简单电路。 当使能信号（ENAT）变为“1”时，当时钟信号（PCLKB）从高电平转变为低电平时，触发器电路（FF）将低电平的输出信号输出到时钟反相器电路（INVO） 高水平。 时钟反相器电路（INVO）在时钟信号（PCLKB）处于低电平时有效，并且触发器电路（FF）的输出信号反相，并将输出信号输出到保持电路（LATCH）。 保持电路（LATCH）保持时钟反相器电路（INVO）的输出信号，并将输出信号作为信号（ENAOUT）输出。

公开(公告)号：US20120252322A1

公开(公告)日：2012-10-04

申请号：US13433883

申请日：2012-03-29

申请人： Hideki ISHIGAMI ,  Hidefumi NAKAMURA ,  Junichi HAYASHI

发明人： Hideki ISHIGAMI ,  Hidefumi NAKAMURA ,  Junichi HAYASHI

IPC分类号： B24B1/00 ,  C09K3/14

CPC分类号： B24B31/02 ,  B22F3/225 ,  B22F2998/10 ,  C22C1/1084 ,  C22C27/04 ,  B22F3/20 ,  B22F3/10 ,  B22F3/24 ,  C22C1/1094

摘要： A polishing media is formed of a sintered body in which a metal structure and a ceramic structure are intermingled with each other. The polishing media is preferably produced by molding a mixed powder of a metal powder and a ceramic powder by an injection molding method and sintering the resulting molded article. Further, the ceramic structure is preferably formed of aluminum oxide, and the metal structure is preferably formed of tungsten.

摘要翻译： 抛光介质由金属结构和陶瓷结构彼此混合的烧结体形成。 研磨介质优选通过注射成型法成型金属粉末和陶瓷粉末的混合粉末并烧结所得到的成型体来制造。 此外，陶瓷结构优选由氧化铝形成，并且金属结构优选由钨形成。

公开(公告)号：US20120195090A1

公开(公告)日：2012-08-02

申请号：US13358448

申请日：2012-01-25

申请人： Junichi HAYASHI ,  Homare Sato

发明人： Junichi HAYASHI ,  Homare Sato

IPC分类号： G11C5/06

CPC分类号： G11C5/063 ,  G11C5/02

摘要： Such a device is disclosed that includes first and second chips stacked to each other, and a third chip controlling the first and second chips, stacked on the first and second chips, and including first, second and third output circuits. The first output circuit supplies a first command signal to the first chip. The second output circuit supplies the first command signal to the second chip. The third output circuit supplies a second command signal to the first and second chips.

摘要翻译： 公开了这样的装置，其包括彼此堆叠的第一和第二芯片，以及控制堆叠在第一和第二芯片上的第一和第二芯片的第三芯片，并且包括第一，第二和第三输出电路。 第一输出电路向第一芯片提供第一命令信号。 第二输出电路将第一命令信号提供给第二芯片。 第三输出电路向第一和第二芯片提供第二命令信号。

公开(公告)号：US20120182822A1

公开(公告)日：2012-07-19

申请号：US13347542

申请日：2012-01-10

申请人： Junichi HAYASHI

发明人： Junichi HAYASHI

IPC分类号： G11C8/00

CPC分类号： G11C11/403 ,  G11C5/04 ,  G11C8/12 ,  H01L23/481 ,  H01L27/10897 ,  H01L2224/16145 ,  H01L2224/16225

摘要： Such a device is disclosed that includes a first chip outputting a bank address signal and an active signal, and a plurality of second chips stacked on the first chip. Each of the second chips includes a plurality of memory banks each selected based on the bank address signal. Selected one or ones of the memory banks is brought into an active state in response to the active signal. Each of the second chips activates a local bank active signal when at least one of the memory banks included therein is in the active state. The first chip activates a bank active signal when at least one of the local bank active signals is activated.

摘要翻译： 公开了一种包括输出库地址信号和有效信号的第一芯片以及堆叠在第一芯片上的多个第二芯片的装置。 每个第二芯片包括基于存储体地址信号选择的多个存储体。 选择的一个或一个存储体被响应于有效信号而进入活动状态。 当其中包括的至少一个存储体处于活动状态时，每个第二芯片激活本地存储体活动信号。 当激活本地存储体活动信号中的至少一个时，第一芯片激活存储体活动信号。