公开(公告)号：US5521125A

公开(公告)日：1996-05-28

申请号：US328789

申请日：1994-10-28

Applicant: Brian T. Ormond ,  Josef E. Jedlicka

Inventor： Brian T. Ormond ,  Josef E. Jedlicka

IPC: H01L21/304 ,  H01L21/78

CPC classification number: H01L21/78 ,  H01L21/3043

Abstract: A wafer design and dicing technique for creating semiconductor chips from wafers. A succession of oxide layers are deposited in first and second regions of a surface of a silicon substrate. The regions are separated by a street having no oxide layers therein, and the successive oxide layers form a vertical wall with a surface normal to the surface of the silicon substrate. A shock-absorbent material is deposited in the street, forming a concave meniscus therein. The shock-absorbent material retards the trajectories of silicon particles set into motion when the wafer is diced into chips.

Abstract translation: 用于从晶圆制造半导体芯片的晶片设计和切割技术。 一系列氧化物层沉积在硅衬底表面的第一和第二区域中。 这些区域由其中没有氧化物层的街道分开，并且连续的氧化物层形成具有与硅衬底的表面垂直的表面的垂直壁。 冲击吸收材料沉积在街上，在其中形成凹面弯月面。 当晶片切成芯片时，吸震材料阻止硅颗粒轨迹运动。

公开(公告)号：US06255133B1

公开(公告)日：2001-07-03

申请号：US09641292

申请日：2000-08-18

Applicant: Brian T. Ormond ,  Josef E. Jedlicka ,  Thomas Grimsley ,  Paul A. Hosier

Inventor： Brian T. Ormond ,  Josef E. Jedlicka ,  Thomas Grimsley ,  Paul A. Hosier

IPC: H01L21302

CPC classification number: H01L27/14601 ,  H01L27/14632 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to electro optical devices with a reduced filter thinning on the edge pixels and a method for reducing the thinning of filter layers on the pixels closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner. A semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer is deposited over the main surface exclusive of the bonding pads. Alternatively, a clear layer is deposited over the main surface exclusive of the bonding pads, and a plurality of tabs is then deposited in the tab regions on the main surface. A first primary color filter layer is deposited over at least first inner photosite and first outer photosite, and the first primary color filter layer transmits a primary color.

Abstract translation: 本发明涉及在边缘像素上具有减小的滤光器薄化的电光装置，以及用于减少最接近诸如感光芯片的光电装置的边缘的像素上的滤光层的薄化的方法， 例如，在全色数字复印机或扫描仪中。 半导体晶片包括限定由凹槽分开的多个芯片区域和突片区域的主表面，其中所述芯片区域包括内部光斑，外部光电子​​和键合焊盘。 在突片区域的主表面上沉积多个堤坝，并且在主表面之外沉积清晰层，而不包括粘合垫。 或者，在除了接合焊盘之外的主表面上沉积透明层，然后将多个突片沉积在主表面上的突片区域中。 第一原色滤色器层沉积在至少第一内部光泽和第一外部光泽上，并且第一原色滤色器层透过原色。

公开(公告)号：US5545913A

公开(公告)日：1996-08-13

申请号：US330299

申请日：1994-10-17

Applicant: Kraig A. Quinn ,  Josef E. Jedlicka ,  Brian T. Ormond

Inventor： Kraig A. Quinn ,  Josef E. Jedlicka ,  Brian T. Ormond

IPC: H01L25/04 ,  H01L31/0203 ,  H01L31/00

CPC classification number: H01L25/042 ,  H01L24/32 ,  H01L31/0203 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/10158

Abstract: An assembly facilitates mounting a set of abutted semiconductor chips, such as chips aligned to form a single full-page-width linear array of photosensors in a digital scanner or copier. An elongated bead of electrically conductive adhesive extends along a surface of a support substrate. A plurality of semiconductor chips is disposed along the elongated bead, each semiconductor chip including a linear array of photosensors on a front surface thereof, and a back surface attached to the support substrate by the electrically conductive adhesive. A connection block is disposed along another portion of the elongated bead, the block including a first surface contacting the bead, a second surface, and a conductor extending from the first surface to the second surface.

Abstract translation: 组件有助于安装一组邻接的半导体芯片，例如对准的芯片，以在数字扫描器或复印机中形成光传感器的单个全页宽线性阵列。 导电粘合剂的细长珠沿着支撑基底的表面延伸。 多个半导体芯片沿着细长的凸条设置，每个半导体芯片包括前表面上的光电传感器的线性阵列和通过导电粘合剂附着到支撑基板的后表面。 连接块沿着细长的胎圈的另一部分设置，该块包括接触胎圈的第一表面，第二表面和从第一表面延伸到第二表面的导体。

公开(公告)号：US06222180B1

公开(公告)日：2001-04-24

申请号：US09669124

申请日：2000-09-25

Applicant: Brian T. Ormond ,  Josef E. Jedlicka ,  Thomas Grimsley

Inventor： Brian T. Ormond ,  Josef E. Jedlicka ,  Thomas Grimsley

IPC: G01J350

CPC classification number: H01L27/14632 ,  G01J3/51 ,  G01J3/513 ,  H01L27/14621 ,  H01L27/14687

Abstract: The present invention relates to semiconductor devices with a reduced filter thinning of outer photosites and a method for reducing the thinning of filter layers of the outer photosites. A semiconductor device includes a main surface including a plurality of photosites and bonding pads defined in the main surface, wherein the photosites include inner photosites and outer photosites. The semiconductor device further includes a clear layer deposited over the main surface exclusive of the bonding pads and outer photosites, and a first primary color filter layer deposited over at least first inner photosite and first outer photosite, the first primary color filter transmitting a primary color.

Abstract translation: 本发明涉及具有减小的外部光斑的过滤器薄化的半导体器件以及用于减少外部光斑的滤光层的薄化的方法。 半导体器件包括主表面，该主表面包括限定在主表面中的多个光斑和接合焊盘，其中所述光斑包括内部光斑和外部光泽。 所述半导体器件还包括沉积在所述主表面上而不是所述接合焊盘和外部光泽的清晰层，以及沉积在至少第一内部光泽和第一外部光泽上的第一原色滤色器层，所述第一原色滤色器透过原色 。

公开(公告)号：US06198093B1

公开(公告)日：2001-03-06

申请号：US09196394

申请日：1998-11-19

Applicant: Brian T. Ormond ,  Josef E. Jedlicka ,  Thomas Grimsley

Inventor： Brian T. Ormond ,  Josef E. Jedlicka ,  Thomas Grimsley

IPC: G01J350

CPC classification number: H01L27/14632 ,  G01J3/51 ,  G01J3/513 ,  H01L27/14621 ,  H01L27/14687

Abstract: The present invention relates to semiconductor devices with a reduced filter thinning of outer photosites and a method for reducing the thinning of filter layers of the outer photosites. A semiconductor device includes a main surface including a plurality of photosites and bonding pads defined in the main surface, wherein the photosites include inner photosites and outer photosites. The semiconductor device further includes a clear layer deposited over the main surface exclusive of the bonding pads and outer photosites, and a first primary color filter layer deposited over at least first inner photosite and first outer photosite, the first primary color filter transmitting a primary color.

公开(公告)号：US5808297A

公开(公告)日：1998-09-15

申请号：US693781

申请日：1996-07-22

Applicant: Josef E. Jedlicka ,  Brian T. Ormond

Inventor： Josef E. Jedlicka ,  Brian T. Ormond

IPC: H01L31/02 ,  H01J40/14

CPC classification number: H01L27/14687 ,  H01L27/14621

Abstract: Semiconductor chips for use in a chip array assembly for scanning of hard-copy images include rows of photosensors, each row of photosensors having a polyimide filter layer for passing one primary color. In addition to the photosensors, a reflective area is provided on the chip, with filter portions provided on the reflective area. The filter portions are created at the same time as the filter layers placed on the photosensors. The filter layers disposed on the reflective area can be used as test sites for determining the light transmissivity of the filter layers on the photosensors.

Abstract translation: 用于扫描硬拷贝图像的芯片阵列组件的半导体芯片包括光传感器行，每行光电传感器具有用于传递一种原色的聚酰亚胺滤光层。 除了光电传感器之外，在芯片上提供反射区域，其中设置在反射区域上的过滤部分。 过滤器部分与放置在光电传感器上的过滤层同时产生。 设置在反射区域上的滤光层可以用作测定光电传感器上的滤光层透光率的测试位置。

公开(公告)号：US5753959A

公开(公告)日：1998-05-19

申请号：US779045

申请日：1997-01-06

Applicant: Kraig A. Quinn ,  Brian T. Ormond ,  Josef E. Jedlicka

Inventor： Kraig A. Quinn ,  Brian T. Ormond ,  Josef E. Jedlicka

IPC: G02B27/00 ,  B41J2/155 ,  B41J2/16 ,  H01L21/98 ,  H01L27/14 ,  H01L29/06 ,  H01L33/00 ,  H04N1/028 ,  H01L31/00

CPC classification number: H01L25/50 ,  B41J2/155 ,  B41J2/1601 ,  B41J2/1603 ,  B41J2/1623 ,  B41J2/1626 ,  B41J2/1631 ,  B41J2/1635 ,  B41J2202/19 ,  B41J2202/20 ,  H01L29/0657 ,  H01L2924/0002

Abstract: Semiconductor chips, such as photosensor arrays for a full-page-width scanner or printhead chips for a full-page-width ink-jet printer, are mounted on a substrate to maintain reasonably consistent spacing among adjacent chips. To remove a defective chip from the array, the substrate is urged evenly against a work surface defining a convex bow. Alternately, back-cuts are provided along abutting edges of the chips, and the silicon around these back-cuts can be sawed away to space defective chips from neighboring good chips. By increasing the spacing of a defective chip from neighboring chips, the defective chip can be removed while minimizing the risk of damage to neighboring chips. Also, batches of chips can be originally manfactured on a single wafer as either "regular" chips or "replacement" chips, with the replacement chips being slightly shorter in a critical dimension.

Abstract translation: 用于全页幅扫描器的光传感器阵列或全页宽喷墨打印机的半导体芯片安装在基板上，以保持相邻芯片之间的合理一致的间隔。 为了从阵列中除去有缺陷的芯片，衬底被均匀地推向限定凸弓的工作表面。 或者，沿着芯片的邻接边缘提供背切，并且围绕这些背切切割的硅可被锯掉以将有缺陷的芯片与邻近的好的芯片隔开。 通过增加有缺陷的芯片与相邻芯片的间隔，可以去除有缺陷的芯片，同时最小化对相邻芯片的损坏风险。 此外，批次的芯片可以原始地在单个晶片上制造为“常规”芯片或“替换”芯片，替换芯片在临界尺寸上略短。

公开(公告)号：US5696626A

公开(公告)日：1997-12-09

申请号：US542247

申请日：1995-10-12

Applicant: Paul A. Hosier ,  Jagdish C. Tandon ,  Josef E. Jedlicka ,  Brian T. Ormond

Inventor： Paul A. Hosier ,  Jagdish C. Tandon ,  Josef E. Jedlicka ,  Brian T. Ormond

IPC: H01L31/0216 ,  H04N1/04

CPC classification number: H01L31/02162

Abstract: A photosensitive chip, such as used in a scanner or facsimile, defines a linear array of photosites, each photosite being covered with a filter formed from a cured translucent liquid. At the critical ends of the chip, between the end photosite in the array and the edge of the chip, there is provided a ridge which protrudes over the thickness of the filter. This ridge maintains the physical integrity of the filter.

Abstract translation: 诸如用于扫描仪或传真机中的感光芯片限定了一种线性阵列的光斑，每个光斑都被由固化的半透明液体形成的过滤器覆盖。 在芯片的临界端，在阵列中的端部闪光和芯片的边缘之间，设置有突出于过滤器厚度的脊。 该脊保持过滤器的物理完整性。

公开(公告)号：US5128282A

公开(公告)日：1992-07-07

申请号：US787445

申请日：1991-11-04

Applicant: Brian T. Ormond ,  Kraig A. Quinn ,  Paul A. Hosier ,  Josef E. Jedlicka

Inventor： Brian T. Ormond ,  Kraig A. Quinn ,  Paul A. Hosier ,  Josef E. Jedlicka

IPC: H01L21/304 ,  H01L31/18

CPC classification number: H01L21/304 ,  H01L31/1804 ,  Y02E10/547

Abstract: A process for separating image sensor dies and the like from a wafer in which pairs of separation grooves separating each row of dies are formed in the active side of the wafer, with the tab between each groove pair being substantially equal to the width of the dicing blade, cutting a single bottom groove in the inactive side of the wafer opposite to and spanning each pair of separation grooves, and aligning the dicing blade with the midpoint of the wall of one groove in each pair of grooves so as to cut between the rows of dies. In a second embodiment, a two-pass separation process is enabled in which the tab between separation grooves is slightly larger than the width of the dicing blade, with the dicing blade first aligned with the midpoint of one separation groove to cut one row of dies from the wafer together with part of the tab, with the blade realigned with the midpoint of the other separate groove to cut a second row of dies and the remainder of the tab.

Abstract translation: 用于从晶片分离图像传感器管芯等的工艺，其中在晶片的有源侧形成有分隔每一列管芯的隔离槽对，每个槽对之间的突片基本上等于切割宽度 切割晶片的不活动侧的单个底槽，与每对分隔槽相对并跨越每对分隔槽，并将切割刀片与每对槽中的一个槽的壁的中点对准，以便在行之间切割 的死亡。 在第二实施例中，能够进行双路分离处理，其中分离槽之间的突片略大于切割刀片的宽度，其中切割刀片首先与一个分隔槽的中点对齐，以切割一排模具 从晶片与片的一部分一起，刀片与另一个分开的凹槽的中点重新对准，以切割第二排模具和突片的其余部分。

公开(公告)号：US06201293B1

公开(公告)日：2001-03-13

申请号：US09196462

申请日：1998-11-19

Applicant: Brian T. Ormond ,  Josef E. Jedlicka ,  Thomas Grimsley ,  Paul A. Hosier

Inventor： Brian T. Ormond ,  Josef E. Jedlicka ,  Thomas Grimsley ,  Paul A. Hosier

IPC: H01L23495

CPC classification number: H01L27/14601 ,  H01L27/14632 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to electro optical devices with a reduced filter thinning on the edge pixels and a method for reducing the thinning of filter layers on the pixels closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner. A semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer is deposited over the main surface exclusive of the bonding pads. Alternatively, a clear layer is deposited over the main surface exclusive of the bonding pads, and a plurality of tabs is then deposited in the tab regions on the main surface. A first primary color filter layer is deposited over at least first inner photosite and first outer photosite, and the first primary color filter layer transmits a primary color.