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18 条记录 (耗时 0.032 秒)

    Semiconductor memory device having a data line sense amplifier
    5.
    发明授权
    Semiconductor memory device having a data line sense amplifier 有权
    具有数据线读出放大器的半导体存储器件

    公开(公告)号：US08659960B2

    公开(公告)日：2014-02-25

    申请号：US13309090

    申请日：2011-12-01

    申请人： Jong-Su Kim

    发明人： Jong-Su Kim

    IPC分类号： G11C7/00 ,  G11C7/06

    CPC分类号： G11C7/06 ,  G11C11/4091 ,  G11C11/4094

    摘要： A memory device includes a data line sense amplifier configured to receive a sense amplifying power source voltage and a sense amplifying ground voltage through a sense amplifying power source line and a sense amplifying ground line, respectively, and sense-amplify data loaded on a pair of data lines, and a pre-charging unit configured to pre-charge and equalize the sense amplifying power source line and the sense amplifying ground line with a sense amplifying pre-charge voltage, generate the sense amplifying pre-charge voltage by voltage dividing the sense amplifying power source voltage and the sense amplifying ground voltage through a voltage dividing path including the sense amplifying power source line and the sense amplifying ground line, and apply the sense amplifying power source voltage to the sense amplifying power source line and the sense amplifying ground voltage to the sense amplifying ground line in response to a sense amplifying pre-charge control signal.

    摘要翻译： 存储器件包括分别通过读出放大电源线和感测放大接地线接收读出放大电源电压和感测放大接地电压的数据线读出放大器，并且读出放大一对 数据线和预充电单元，其被配置为以感测放大预充电电压对感测放大电源线和感测放大接地线进行预充电和均衡，通过将感测电压分压产生感测放大预充电电压 通过包括感测放大电源线和感测放大接地线的分压路径放大电源电压和感测放大接地电压，并将感测放大电源电压施加到感测放大电源线和感测放大接地电压 响应于感测放大预充电控制信号到感测放大接地线。

    Semiconductor device for preventing plasma induced damage and layout thereof
    6.
    发明授权
    Semiconductor device for preventing plasma induced damage and layout thereof 有权
    用于防止等离子体引起的损坏的半导体装置及其布局

    公开(公告)号：US08592913B2

    公开(公告)日：2013-11-26

    申请号：US13101617

    申请日：2011-05-05

    申请人： Jong-Su Kim

    发明人： Jong-Su Kim

    IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H01L27/0629

    摘要： A semiconductor device includes a diode having a first terminal connected to a first-conductivity-type well, and a second-conductivity-type MOS transistor having a first junction and a gate connected to a second terminal of the diode, and a second junction connected to a first power supply voltage terminal.

    摘要翻译： 半导体器件包括具有连接到第一导电型阱的第一端子的二极管和具有连接到二极管的第二端子的第一结和栅极的第二导电型MOS晶体管，以及连接到二极管的第二连接点 到第一电源电压端子。

    Data sensing circuit and memory device including the same
    8.
    发明授权
    Data sensing circuit and memory device including the same 有权
    数据检测电路和包含其的存储器件

    公开(公告)号：US09159384B2

    公开(公告)日：2015-10-13

    申请号：US13604425

    申请日：2012-09-05

    申请人： Jong-Su Kim

    发明人： Jong-Su Kim

    IPC分类号： G11C7/00 ,  G11C7/12 ,  G11C11/4091 ,  G11C11/4094

    CPC分类号： G11C7/12 ,  G11C11/4091 ,  G11C11/4094

    摘要： An memory device includes a bit line, an NMOS transistor configured to supply a voltage of a pull-up voltage terminal to the bit line in response to a voltage level of the bit line and a PMOS transistor configured to supply a voltage of a pull-down voltage terminal to the bit line in response to the voltage level of the bit line.

    摘要翻译： 存储器件包括位线，NMOS晶体管，其被配置为响应于位线的电压电平向位线提供上拉电压端子的电压;以及PMOS晶体管，被配置为提供上拉电压端子的电压， 降压端子响应于位线的电压电平到位线。

    Protection circuit for semiconductor device
    10.
    发明授权
    Protection circuit for semiconductor device 有权
    半导体器件保护电路

    公开(公告)号：US08405151B2

    公开(公告)日：2013-03-26

    申请号：US12832348

    申请日：2010-07-08

    申请人： Jong-Su Kim

    发明人： Jong-Su Kim

    IPC分类号： H01L23/58

    CPC分类号： H01L27/0255 ,  H01L27/092

    摘要： A protection circuit for a semiconductor device includes a first gate electrode formed on a substrate of a first conductivity type, and a source and a drain of a second conductivity type having an opposite polarity to the first conductivity type. The source and the drain are commonly coupled to a ground voltage terminal, and the first gate electrode is coupled to a power supply voltage terminal.

    摘要翻译： 用于半导体器件的保护电路包括形成在第一导电类型的衬底上的第一栅极电极和与第一导电类型具有相反极性的第二导电类型的源极和漏极。 源极和漏极通常耦合到接地电压端子，并且第一栅电极耦合到电源电压端子。