公开(公告)号：US20100301347A1

公开(公告)日：2010-12-02

申请号：US12475740

申请日：2009-06-01

Applicant: Jinwook Chung ,  Han Wang ,  Tomas Palacios

Inventor： Jinwook Chung ,  Han Wang ,  Tomas Palacios

IPC: H01L29/20 ,  H01L21/18

CPC classification number: H01L21/8258 ,  H01L21/2007 ,  H01L27/0605 ,  H01L29/2003 ,  H01L29/7781 ,  H01L29/7787

Abstract: A semiconductor arrangement is provided that includes one or more substrate structures. One or more nitride-based material structures are used in fabricating nitride-based devices. One or more intermediary layers are interposed between the one or more substrate structures and the one or more nitride-based material structures. The one or more intermediary layers support the lattice mismatch and thermal expansion coefficients between the one or more nitride-based material structure and the one or more substrate structures. Several new electronic devices based on this arrangement are described.

Abstract translation: 提供了包括一个或多个衬底结构的半导体布置。 一种或多种基于氮化物的材料结构用于制造基于氮化物的器件。 一个或多个中间层插入在一个或多个衬底结构和一个或多个氮化物基材料结构之间。 一个或多个中间层支持一种或多种基于氮化物的材料结构与一种或多种衬底结构之间的晶格失配和热膨胀系数。 描述了基于这种布置的几种新的电子设备。

公开(公告)号：US08703623B2

公开(公告)日：2014-04-22

申请号：US12475740

申请日：2009-06-01

Applicant: Jinwook Chung ,  Han Wang ,  Tomas Palacios

Inventor： Jinwook Chung ,  Han Wang ,  Tomas Palacios

IPC: H01L21/31 ,  H01L21/469 ,  H01L31/101

CPC classification number: H01L21/8258 ,  H01L21/2007 ,  H01L27/0605 ,  H01L29/2003 ,  H01L29/7781 ,  H01L29/7787

Abstract: A semiconductor arrangement is provided that includes one or more substrate structures. One or more nitride-based material structures are used in fabricating nitride-based devices. One or more intermediary layers are interposed between the one or more substrate structures and the one or more nitride-based material structures. The one or more intermediary layers support the lattice mismatch and thermal expansion coefficients between the one or more nitride-based material structure and the one or more substrate structures. Several new electronic devices based on this arrangement are described.

Abstract translation: 提供了包括一个或多个衬底结构的半导体布置。 一种或多种基于氮化物的材料结构用于制造基于氮化物的器件。 一个或多个中间层插入在一个或多个衬底结构和一个或多个基于氮化物的材料结构之间。 一个或多个中间层支持一种或多种基于氮化物的材料结构与一种或多种衬底结构之间的晶格失配和热膨胀系数。 描述了基于这种布置的几种新的电子设备。

公开(公告)号：US08188459B2

公开(公告)日：2012-05-29

申请号：US12577892

申请日：2009-10-13

Applicant: Tomas Palacios ,  Jinwook Chung

Inventor： Tomas Palacios ,  Jinwook Chung

IPC: H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC classification number: H01L29/66462 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/7787

Abstract: A nitride-based semiconductor device is provided. The nitride-base semiconductor device includes a substrate comprising one or more locally etched regions and a buffer layer comprising one or multiple InAlGaN layers on the substrate. A channel layer includes GaN on the buffer layer. A barrier layer includes one or multiple AlGaN layers on the channel layer.

Abstract translation: 提供了一种氮化物基半导体器件。 氮化物基半导体器件包括包括一个或多个局部蚀刻区域的衬底和在衬底上包括一个或多个InAlGaN层的缓冲层。 沟道层在缓冲层上包括GaN。 阻挡层包括沟道层上的一个或多个AlGaN层。

公开(公告)号：US20100032717A1

公开(公告)日：2010-02-11

申请号：US12577892

申请日：2009-10-13

Applicant: Tomas Palacios ,  Jinwook Chung

Inventor： Tomas Palacios ,  Jinwook Chung

IPC: H01L29/778 ,  H01L29/205 ,  H01L21/335

CPC classification number: H01L29/66462 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/7787

Abstract: A nitride-based semiconductor device is provided. The nitride-base semiconductor device includes a substrate comprising one or more locally etched regions and a buffer layer comprising one or multiple InAlGaN layers on the substrate. A channel layer includes GaN on the buffer layer. A barrier layer includes one or multiple AlGaN layers on the channel layer.

Abstract translation: 提供了一种氮化物基半导体器件。 氮化物基半导体器件包括包括一个或多个局部蚀刻区域的衬底和在衬底上包括一个或多个InAlGaN层的缓冲层。 沟道层在缓冲层上包括GaN。 阻挡层包括沟道层上的一个或多个AlGaN层。

公开(公告)号：US08921892B2

公开(公告)日：2014-12-30

申请号：US13167236

申请日：2011-06-23

Applicant: Tomas Apostol Palacios ,  Jinwook Chung

Inventor： Tomas Apostol Palacios ,  Jinwook Chung

IPC: H01L29/739 ,  H01L31/072

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/66924

Abstract: A method of forming a transistor over a nitride semiconductor layer includes surface-treating a first region of a nitride semiconductor layer and forming a gate over the first region. Surface-treating the first region can cause the transistor to have a higher intrinsic small signal transconductance than a similar transistor formed without the surface treatment. A portion of the bottom of the gate can be selectively etched. A resulting transistor can include a nitride semiconductor layer having a surface-treated region and a gate formed over or adjacent to the surface-treated region.

Abstract translation: 在氮化物半导体层上形成晶体管的方法包括对氮化物半导体层的第一区域进行表面处理并在第一区域上形成栅极。 对第一区域进行表面处理可能导致晶体管具有比没有表面处理形成的类似晶体管更高的本征小信号跨导。 可以选择性地蚀刻栅极底部的一部分。 所得到的晶体管可以包括具有表面处理区域和形成在表面处理区域上或附近的栅极的氮化物半导体层。

公开(公告)号：US20120012894A1

公开(公告)日：2012-01-19

申请号：US13167236

申请日：2011-06-23

Applicant: Tomas Apostol Palacios ,  Jinwook Chung

Inventor： Tomas Apostol Palacios ,  Jinwook Chung

IPC: H01L29/778 ,  H01L21/20 ,  H01L29/772 ,  H01L21/28

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/66924

Abstract: A method of forming a transistor over a nitride semiconductor layer includes surface-treating a first region of a nitride semiconductor layer and forming a gate over the first region. Surface-treating the first region can cause the transistor to have a higher intrinsic small signal transconductance than a similar transistor formed without the surface treatment. A portion of the bottom of the gate can be selectively etched. A resulting transistor can include a nitride semiconductor layer having a surface-treated region and a gate formed over or adjacent to the surface-treated region.

Abstract translation: 在氮化物半导体层上形成晶体管的方法包括对氮化物半导体层的第一区域进行表面处理并在第一区域上形成栅极。 对第一区域进行表面处理可能导致晶体管具有比没有表面处理形成的类似晶体管更高的本征小信号跨导。 可以选择性地蚀刻栅极底部的一部分。 所得到的晶体管可以包括具有表面处理区域和形成在表面处理区域上或附近的栅极的氮化物半导体层。