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1.发明授权公开(公告)号：US09251864B2
公开(公告)日：2016-02-02
申请号：US13605129
申请日：2012-09-06
申请人： Jan Otterstedt , Wolf Allers , Mihail Jefremow , Edvin Paparisto , Leonardo Castro , Thomas Kern
发明人： Jan Otterstedt , Wolf Allers , Mihail Jefremow , Edvin Paparisto , Leonardo Castro , Thomas Kern
CPC分类号： G11C29/83 , G11C5/143 , G11C29/02 , G11C29/04 , G11C29/832
摘要： The invention relates to an electronic memory system, and more specifically, to a system for providing voltage supply protection in a memory device, and a method for providing voltage supply protection in a memory device. According to an embodiment, a system for providing voltage supply protection in a memory device is provided, the system including a memory array including a plurality of memory cells arranged in a plurality of groups of memory cells, and a plurality of current limiting elements, wherein each group of memory cells is associated with at least one current limiting element.
摘要翻译： 本发明涉及一种电子存储器系统，更具体地说，涉及一种用于在存储器件中提供电压保护的系统，以及一种在存储器件中提供电压保护的方法。 根据实施例，提供了一种用于在存储器件中提供电压保护的系统，该系统包括一个存储器阵列，该存储器阵列包括布置在多组存储器单元中的多个存储单元，以及多个限流元件，其中 每组存储器单元与至少一个限流元件相关联。
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2.发明申请公开(公告)号：US20140064011A1
公开(公告)日：2014-03-06
申请号：US13605129
申请日：2012-09-06
申请人： Jan Otterstedt , Wolf Allers , Mihail Jefremow , Edvin Paparisto , Leonardo Castro , Thomas Kern
发明人： Jan Otterstedt , Wolf Allers , Mihail Jefremow , Edvin Paparisto , Leonardo Castro , Thomas Kern
IPC分类号： G11C5/14
CPC分类号： G11C29/83 , G11C5/143 , G11C29/02 , G11C29/04 , G11C29/832
摘要： The invention relates to an electronic memory system, and more specifically, to a system for providing voltage supply protection in a memory device, and a method for providing voltage supply protection in a memory device. According to an embodiment, a system for providing voltage supply protection in a memory device is provided, the system including a memory array including a plurality of memory cells arranged in a plurality of groups of memory cells, and a plurality of current limiting elements, wherein each group of memory cells is associated with at least one current limiting element.
摘要翻译： 本发明涉及一种电子存储器系统，更具体地说，涉及一种用于在存储器件中提供电压保护的系统，以及一种在存储器件中提供电压保护的方法。 根据实施例，提供了一种用于在存储器件中提供电压保护的系统，该系统包括一个存储器阵列，该存储器阵列包括布置在多组存储器单元中的多个存储单元，以及多个限流元件，其中 每组存储器单元与至少一个限流元件相关联。
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3.发明授权Method and system for switchable erase or write operations in nonvolatile memory 有权非易失性存储器中切换擦除或写入操作的方法和系统公开(公告)号：US09190149B2
公开(公告)日：2015-11-17
申请号：US13593618
申请日：2012-08-24
申请人： Jan Otterstedt , Wolf Allers , Mihail Jefremow , Edvin Paparisto , Leonardo Castro , Christian Peters
发明人： Jan Otterstedt , Wolf Allers , Mihail Jefremow , Edvin Paparisto , Leonardo Castro , Christian Peters
CPC分类号： G11C16/0433 , G11C16/14
摘要： Embodiments relate to systems and methods including a step of switching between two or more erase operations and/or two or more write operations for erasing of and/or writing to least one memory cell of a nonvolatile memory enabling to select a most suitable erase and/or write operation for a particular erase and/or write operation within the memory.
摘要翻译： 实施例涉及包括在两个或多个擦除操作之间切换和/或用于擦除和/或写入非易失性存储器的至少一个存储器单元的两个或多个写入操作的步骤的系统和方法，其能够选择最合适的擦除和/ 或对存储器内的特定擦除和/或写入操作进行写操作。
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4.发明申请Method and System for Switchable Erase or Write Operations in Nonvolatile Memory 有权非易失性存储器中可切换擦除或写入操作的方法和系统公开(公告)号：US20140056079A1
公开(公告)日：2014-02-27
申请号：US13593618
申请日：2012-08-24
申请人： Jan Otterstedt , Wolf Allers , Mihail Jefremow , Edvin Paparisto , Leonardo Castro , Christian Peters
发明人： Jan Otterstedt , Wolf Allers , Mihail Jefremow , Edvin Paparisto , Leonardo Castro , Christian Peters
IPC分类号： G11C16/04
CPC分类号： G11C16/0433 , G11C16/14
摘要： Embodiments relate to systems and methods including a step of switching between two or more erase operations and/or two or more write operations for erasing of and/or writing to least one memory cell of a nonvolatile memory enabling to select a most suitable erase and/or write operation for a particular erase and/or write operation within the memory.
摘要翻译： 实施例涉及包括在两个或多个擦除操作之间切换和/或用于擦除和/或写入非易失性存储器的至少一个存储器单元的两个或多个写入操作的步骤的系统和方法，其能够选择最合适的擦除和/ 或对存储器内的特定擦除和/或写入操作进行写操作。
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5.发明授权System and method for emulating an EEPROM in a non-volatile memory device 有权用于在非易失性存储器件中仿真EEPROM的系统和方法公开(公告)号：US09389999B2
公开(公告)日：2016-07-12
申请号：US13587993
申请日：2012-08-17
CPC分类号： G06F12/0246 , G06F2212/1044 , G06F2212/7202 , G11C16/105
摘要： The invention relates to an electronic memory system, and more specifically, to a system for emulating an electrically erasable programmable read only memory in a non-volatile memory device, and a method of emulating an electrically erasable programmable read only memory in a non-volatile memory device. According to an embodiment, a system for emulating an electrically erasable programmable read only memory is provided, the system including a Flash memory, wherein the Flash memory is configurable into a first region and a second region, wherein the first region is adapted to store a first class of data and the second region is adapted to store a second, different class of data.
摘要翻译： 本发明涉及一种电子存储器系统，更具体地说，涉及用于在非易失性存储器件中仿真电可擦除可编程只读存储器的系统，以及一种以非易失性存储器模拟电可擦除可编程只读存储器的方法 存储设备。 根据实施例，提供了一种用于模拟电可擦除可编程只读存储器的系统，该系统包括闪存，其中闪存可配置成第一区域和第二区域，其中第一区域适于存储 第一类数据和第二区域适于存储第二种不同类别的数据。
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6.发明申请SYSTEM AND METHOD FOR EMULATING AN EEPROM IN A NON-VOLATILE MEMORY DEVICE 有权用于在非易失性存储器件中仿真EEPROM的系统和方法公开(公告)号：US20140052896A1
公开(公告)日：2014-02-20
申请号：US13587993
申请日：2012-08-17
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/1044 , G06F2212/7202 , G11C16/105
摘要： The invention relates to an electronic memory system, and more specifically, to a system for emulating an electrically erasable programmable read only memory in a non-volatile memory device, and a method of emulating an electrically erasable programmable read only memory in a non-volatile memory device. According to an embodiment, a system for emulating an electrically erasable programmable read only memory is provided, the system including a Flash memory, wherein the Flash memory is configurable into a first region and a second region, wherein the first region is adapted to store a first class of data and the second region is adapted to store a second, different class of data.
摘要翻译： 本发明涉及一种电子存储器系统，更具体地说，涉及用于在非易失性存储器件中仿真电可擦除可编程只读存储器的系统，以及一种以非易失性存储器模拟电可擦除可编程只读存储器的方法 存储设备。 根据实施例，提供了一种用于模拟电可擦除可编程只读存储器的系统，该系统包括闪存，其中闪存可配置成第一区域和第二区域，其中第一区域适于存储 第一类数据和第二区域适于存储第二种不同类别的数据。
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7.发明授权公开(公告)号：US07236403B2
公开(公告)日：2007-06-26
申请号：US11005804
申请日：2004-12-07
IPC分类号： G11C16/00
摘要： Precharge arrangement for read access for integrated nonvolatile memories having at least one memory cell (2), at least one source line (8), at least one bit line (9), at least one sense amplifier (3) and at least one precharge potential, the bit line (9) continuously having the precharge potential in a deselected state of the bit line (9), and the source line (8) having a predetermined reference potential, in particular a ground potential (10), in a selected state of the bit line (9).
摘要翻译： 用于具有至少一个存储器单元（2），至少一个源极线（8），至少一个位线（9），至少一个读出放大器（3）和至少一个预充电的集成非易失性存储器的读取访问的预充电布置 电位，位线（9）连续地具有处于位线（9）的取消选择状态的预充电电位，以及具有预定参考电位的源极线（8），特别是接地电位（10） 位线（9）的状态。
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公开(公告)号：US20070223284A1
公开(公告)日：2007-09-27
申请号：US11680357
申请日：2007-02-28
摘要： An integrated circuit having a memory arrangement is disclosed. In one embodiment, the memory arrangement includes a plurality of memory cells, a delete line for deleting the memory cells, and a read line for reading out the memory cells. There are either provided separate lines as delete line and as read line, or the same line serves both as delete line and as read line. The memory cell arrangement includes at least one delete memory sector and at least one read memory section. The number of memory cells of at least one delete memory sector does not concur with the number of memory cells of at least one read memory sector.
摘要翻译： 公开了一种具有存储装置的集成电路。 在一个实施例中，存储器装置包括多个存储器单元，用于删除存储单元的删除行和用于读出存储单元的读取行。 或者提供单独的行作为删除行和读取行，或者同一行用作删除行和读取行。 存储单元布置包括至少一个删除存储器扇区和至少一个读取存储器区段。 至少一个删除存储器扇区的存储器单元的数量不与至少一个读取存储器扇区的存储器单元的数量一致。
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公开(公告)号：US20060126388A1
公开(公告)日：2006-06-15
申请号：US11274483
申请日：2005-11-16
申请人： Edvin Paparisto , Stephan Rogl
发明人： Edvin Paparisto , Stephan Rogl
IPC分类号： G11C16/06
CPC分类号： G11C29/1201 , G11C16/04 , G11C29/50 , G11C29/50004 , G11C2029/5006
摘要： The invention relates to a procedure and a device for measuring memory cell currents, in particular for non-volatile memory components, where the device has a current mirroring device for mirroring a current flowing through a memory cell when it is being read, and delivering an analog current signal generated during the mirroring, or an analog current signal derived from it, to an analog output pad of a memory component.
摘要翻译： 本发明涉及用于测量存储单元电流的程序和装置，特别是用于非易失性存储器组件的装置，其中该装置具有用于在读取存储单元时流过存储单元的电流的电流镜像装置， 在镜像期间产生的模拟电流信号或从其导出的模拟电流信号到存储器组件的模拟输出焊盘。
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10.发明授权Memory device, method for operating a memory device, and apparatus for use with a memory device 有权存储器件，用于操作存储器件的方法，以及用于存储器件的装置公开(公告)号：US07675781B2
公开(公告)日：2010-03-09
申请号：US11607354
申请日：2006-12-01
申请人： Christoph Deml , Edvin Paparisto
发明人： Christoph Deml , Edvin Paparisto
IPC分类号： G11C16/06
CPC分类号： G11C16/26
摘要： A memory device, including a non-volatile memory device, a method for operating a memory device, and an apparatus for use with a memory device is disclosed. In one embodiment, the memory device includes at least one evaluation circuit for amplifying a signal resulting from the reading of a memory cell, and a device for precharging an output of the evaluation circuit to a predetermined voltage level.
摘要翻译： 公开了一种包括非易失性存储装置，用于操作存储装置的方法以及与存储装置一起使用的装置的存储装置。 在一个实施例中，存储器件包括至少一个用于放大由存储单元的读取产生的信号的评估电路，以及用于将评估电路的输出预充电至预定电压电平的装置。
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