TEMPERATURE COMPENSATION SYSTEM AND METHOD FOR AN ARRAY ANTENNA SYSTEM
    5.
    发明申请
    TEMPERATURE COMPENSATION SYSTEM AND METHOD FOR AN ARRAY ANTENNA SYSTEM 有权
    温度补偿系统和阵列天线系统的方法

    公开(公告)号:US20170070247A1

    公开(公告)日:2017-03-09

    申请号:US14849491

    申请日:2015-09-09

    IPC分类号: H04B1/04 H04B7/06 H04W72/04

    CPC分类号: H04W72/0406 H04B17/12

    摘要: A system and method compensates for temperature in a signal path of an antenna array. The signal path includes an antenna element, a first phase shifter or a time delay unit, and a first variable gain power amplifier. The system and method can provide at least one of a local temperature signal, a remote temperature signal, and both the local temperature signal and the remote temperature signal to a slope control circuit, and provide a phase control signal or a gain control signal using the slope control circuit at least partially in response to the at least one of the local temperature signal, the remote temperature signal, and both the local temperature signal and the remote temperature signal.

    摘要翻译: 系统和方法补偿天线阵列的信号路径中的温度。 信号路径包括天线元件,第一移相器或时间延迟单元以及第一可变增益功率放大器。 该系统和方法可以向斜坡控制电路提供本地温度信号,远程温度信号以及本地温度信号和远程温度信号中的至少一个,并且使用该控制信号提供相位控制信号或增益控制信号 斜坡控制电路至少部分响应于本地温度信号,远程温度信号以及本地温度信号和远程温度信号中的至少一个。

    Multi-chip module architecture
    6.
    发明授权
    Multi-chip module architecture 有权
    多芯片模块架构

    公开(公告)号:US09478858B1

    公开(公告)日:2016-10-25

    申请号:US13837934

    申请日:2013-03-15

    IPC分类号: H01Q3/00 H01Q3/34

    摘要: Electronically scanned arrays and multi-chip modules (MCMs) that may be used in such arrays are provided. One MCM may include a set of one or more first semiconductor components and a plurality of second semiconductor components. The first semiconductor component set is coupled to the plurality of second semiconductor components, and the first semiconductor component set is configured to control the plurality of second semiconductor components. Each of the plurality of second semiconductor components is accessible through a plurality of data strings providing communication between the first semiconductor component set and the plurality of second semiconductor components, each data string defining a unique path between the first semiconductor component set and the plurality of second semiconductor components, such that the plurality of data strings provide redundant data paths between the first semiconductor component set and the plurality of second semiconductor components.

    摘要翻译: 提供了可用于这种阵列的电子扫描阵列和多芯片模块(MCM)。 一个MCM可以包括一组一个或多个第一半导体部件和多个第二半导体部件。 第一半导体部件组耦合到多个第二半导体部件,并且第一半导体部件组被配置为控制多个第二半导体部件。 多个第二半导体部件中的每一个可通过提供第一半导体部件组和多个第二半导体部件之间的通信的多个数据串来访问,每个数据串在第一半导体部件组和多个第二半导体部件之间限定唯一的路径 半导体部件,使得多个数据串提供第一半导体部件组和多个第二半导体部件之间的冗余数据路径。

    ESA phase shifter topology
    7.
    发明授权
    ESA phase shifter topology 有权
    ESA移相器拓扑

    公开(公告)号:US09537558B1

    公开(公告)日:2017-01-03

    申请号:US14663641

    申请日:2015-03-20

    摘要: A phase shifter component is described. Inputs are arranged to selectively receive an inphase component of an in-phase (I) signal or an outphase I signal 180° out of phase with the inphase I signal, and to selectively receive an inphase component of a quadrature-phase (Q) signal or an outphase Q signal 180° out of phase with the inphase Q signal. A first gain portion includes only two transistor elements arranged to amplify the received outphase or inphase I signal. A second gain portion includes only two transistor elements arranged to amplify the received outphase or inphase Q signal. The first and second gain portions are configured to control the gain of the received outphase or inphase I signal and the received outphase or inphase Q signal, respectively, to provide a composite output signal with a desired phase shift between 0° and 360°.

    摘要翻译: 描述移相器组件。 输入被布置为选择性地接收与同相I信号180°异相的同相(I)信号或异相I信号的同相分量,并且有选择地接收正交相位(Q)信号的同相分量 或与同相Q信号异相180°的异相Q信号。 第一增益部分仅包括布置成放大所接收的异相或同相I信号的两个晶体管元件。 第二增益部分仅包括布置成放大所接收的异相或同相Q信号的两个晶体管元件。 第一和第二增益部分被配置为分别控制所接收的异相或同相I信号和所接收的异相或同相Q信号的增益,以提供具有在0°和360°之间的期望相移的复合输出信号。

    Reconfigurable filter
    10.
    发明授权
    Reconfigurable filter 有权
    可重构过滤器

    公开(公告)号:US09432126B1

    公开(公告)日:2016-08-30

    申请号:US14314207

    申请日:2014-06-25

    IPC分类号: H04B10/69

    CPC分类号: H04B10/69 H04B10/693

    摘要: A receiver includes an interface for translating an optical signal into two differential electrical signals for a first amplifier. The first amplifier modifies the two differential electrical signals to produce a first signal that is the amplitude of difference between the two differential electrical signals, which contains the information from the optical signal. A variable gain track and hold amplifier (VGTHA) receives the first signal and a clock signal and provides a conditioned analog signal for digital processing. A clock source provides the clock signal, which is aligned with the peak amplitude of the first signal.

    摘要翻译: 接收机包括用于将光信号转换为用于第一放大器的两个差分电信号的接口。 第一放大器修改两个差分电信号以产生第一信号,其是包含来自光信号的信息的两个差分电信号之间的差的振幅。 可变增益跟踪和保持放大器(VGTHA)接收第一个信号和一个时钟信号,并提供经过调节的模拟信号进行数字处理。 时钟源提供与第一信号的峰值幅度对准的时钟信号。