公开(公告)号：US20140291868A1

公开(公告)日：2014-10-02

申请号：US14148717

申请日：2014-01-06

申请人： JIN-HO LEE ,  HEE-SEOK LEE ,  SE-HO YOU ,  JEONG-OH HA

发明人： JIN-HO LEE ,  HEE-SEOK LEE ,  SE-HO YOU ,  JEONG-OH HA

IPC分类号： H01L23/00

CPC分类号： H01L25/105 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/13101 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13169 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/45164 ,  H01L2224/45166 ,  H01L2224/45169 ,  H01L2224/45171 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48601 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48701 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48801 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/85401 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19106 ,  H05K1/0271 ,  H05K3/284 ,  H05K2201/09136 ,  H05K2201/09909 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stack type semiconductor package includes a lower semiconductor package including a lower package substrate and at least one lower semiconductor chip disposed on the lower package substrate; an upper semiconductor package including an upper package substrate larger than the lower package substrate and at least one upper semiconductor chip disposed on the upper package substrate; an inter-package connector connecting an upper surface of the lower package substrate to a lower surface of the upper package substrate; and a filler filling in between the lower package substrate and the upper package substrate while substantially surrounding the inter-package connector.

摘要翻译： 堆叠型半导体封装包括下半导体封装，其包括下封装衬底和设置在下封装衬底上的至少一个下半导体芯片; 上半导体封装，包括比下封装衬底大的上封装衬底和设置在上封装衬底上的至少一个上半导体芯片; 将所述下封装基板的上表面连接到所述上封装基板的下表面的封装间连接器; 以及填充在下封装基板和上封装基板之间的填料，同时基本上围绕封装间连接器。