公开(公告)号：US20230395493A1

公开(公告)日：2023-12-07

申请号：US17833608

申请日：2022-06-06

申请人： Intel Corporation

发明人： Jooi Wah WONG ,  Eng Huat GOH ,  Telesphor KAMGAING ,  Chee Kheong YOON ,  Min Suet LIM ,  Kavitha NAGARAJAN ,  Chu Aun LIM

IPC分类号： H01L23/528 ,  G11C11/4093

CPC分类号： H01L23/5283 ,  G11C11/4093

摘要： Embodiments disclosed herein include package substrates. In an embodiment, a package substrate comprises a core, a first layer on the core, where the first layer comprises a first plane, a second layer on the first layer, where the second layer comprises first traces and second traces arranged in an alternating pattern, a third layer on the second layer, where the third layer comprises third traces and fourth traces arranged in an alternating pattern, and a fourth layer over the third layer, where the fourth layer comprises a second plane.

公开(公告)号：US20230207405A1

公开(公告)日：2023-06-29

申请号：US17561722

申请日：2021-12-24

申请人： Intel Corporation

发明人： Arghya SAIN ,  Andrew P. COLLINS ,  Sivaseetharaman PANDI ,  Telesphor KAMGAING ,  Tolga ACIKALIN ,  Shuhei YAMADA

IPC分类号： H01L23/15 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC分类号： H01L23/15 ,  H01L23/49827 ,  H01L23/49822 ,  H01L21/486 ,  H01L24/16 ,  H01L2924/15311 ,  H01L2224/16227

摘要： Embodiments disclosed herein include electronic devices. In an embodiment, an electronic device comprises a core, where the core comprises a first layer comprising glass, and a second layer comprising glass over the first layer. In an embodiment, a trace is between the first layer and the second layer. In an embodiment, routing layers are on the core.

公开(公告)号：US20230197592A1

公开(公告)日：2023-06-22

申请号：US17553189

申请日：2021-12-16

申请人： Intel Corporation

发明人： Telesphor KAMGAING ,  Brandon RAWLINGS ,  Aleksandar ALEKSOV ,  Andrew P. COLLINS ,  Georgios C. DOGIAMIS ,  Veronica STRONG ,  Neelam PRABHU GAUNKAR

IPC分类号： H01L23/498 ,  H05K1/18 ,  H01L23/15 ,  H01L21/48

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49838 ,  H05K1/181

摘要： Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a core with a first surface and a second surface, where the core comprises glass. In an embodiment, a first buildup layer is over the first surface of the core, and a second buildup layer is under the second surface of the core. In an embodiment, the electronic package further comprises a via through the core between the first surface of the core and the second surface of the core, and a plane into the first surface of the core, where a width of the plane is greater than a width of the via.

公开(公告)号：US20220407212A1

公开(公告)日：2022-12-22

申请号：US17350184

申请日：2021-06-17

申请人： Intel Corporation

发明人： Neelam PRABHU GAUNKAR ,  Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Veronica STRONG ,  Aleksandar ALEKSOV

IPC分类号： H01P7/08 ,  H01L23/15 ,  H01L23/498 ,  H01L23/66 ,  H01L21/48 ,  H01P5/18 ,  H01P11/00

摘要： Embodiments described herein may be related to apparatuses, processes, and techniques related creating millimeter wave components within a glass core of a substrate within a semiconductor package. These millimeter wave components, which include resonators, isolators, directional couplers, and circulators, may be combined to form other structures such as filters or multiplexers. Other embodiments may be described and/or claimed.

公开(公告)号：US20220406698A1

公开(公告)日：2022-12-22

申请号：US17350818

申请日：2021-06-17

申请人： Intel Corporation

发明人： Aleksandar ALEKSOV ,  Neelam PRABHU GAUNKAR ,  Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Veronica STRONG ,  Johanna M. SWAN

IPC分类号： H01L23/498 ,  H01L23/58 ,  H01L21/48 ,  H01F27/28

摘要： Embodiments disclosed herein include electronic packages with magnetic features and methods of forming such packages. In an embodiment, a package substrate comprises a core and a conductive via through a thickness of the core. In an embodiment, a shell surrounds a perimeter of the conductive via and the shell is a magnetic material. In an embodiment, a surface of the conductive via is spaced away from the shell.

公开(公告)号：US20220406685A1

公开(公告)日：2022-12-22

申请号：US17349684

申请日：2021-06-16

申请人： Intel Corporation

发明人： Telesphor KAMGAING

IPC分类号： H01L23/473 ,  H01L23/13 ,  H01L23/15 ,  H01L23/467 ,  H01L23/498 ,  H01L21/48 ,  H01L25/065

摘要： Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, an electronic package comprises a substrate, where the substrate has a first recess and a plurality of second recesses at the bottom of the first recess. In an embodiment a die is coupled to the substrate by a die attach film (DAF), where the die sits in the first recess. In an embodiment, a surface of the DAF seals the second recesses.

公开(公告)号：US20220246554A1

公开(公告)日：2022-08-04

申请号：US17721241

申请日：2022-04-14

申请人： Intel Corporation

发明人： Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Vijay K. NAIR ,  Javier A. FALCON ,  Shawna M. LIFF ,  Yoshihiro TOMITA

IPC分类号： H01L23/66 ,  H01L23/48 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498 ,  H01L23/552 ,  H01L25/10 ,  H01L25/16

摘要： Embodiments of the invention include a microelectronic device that includes a first silicon based substrate having compound semiconductor components. The microelectronic device also includes a second substrate coupled to the first substrate. The second substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.

公开(公告)号：US20220199551A1

公开(公告)日：2022-06-23

申请号：US17129838

申请日：2020-12-21

申请人： Intel Corporation

发明人： Amit Kumar JAIN ,  Sameer SHEKHAR ,  Telesphor KAMGAING ,  Chin Lee KUAN ,  Vivek SAXENA

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/64 ,  H01L49/02 ,  H01L23/498

摘要： Embodiments disclosed herein include electronic packages with stiffeners. In an embodiment, a stiffener for an electronic package comprises a first layer, that is conductive, and a second layer over the first layer, where the second layer is insulative. In an embodiment, the stiffener further comprises a third layer over the second layer, where the third layer is conductive. In an embodiment, the stiffener further comprises a leg attached to the third layer, where the leg extends towards the first layer and is substantially coplanar with a surface of the first layer opposite from the second layer.

公开(公告)号：US20220102261A1

公开(公告)日：2022-03-31

申请号：US17544693

申请日：2021-12-07

申请人： Intel Corporation

发明人： Adel A. ELSHERBINI ,  Mathew J. MANUSHAROW ,  Krishna BHARATH ,  William J. LAMBERT ,  Robert L. SANKMAN ,  Aleksandar ALEKSOV ,  Brandon M. RAWLINGS ,  Feras EID ,  Javier SOTO GONZALEZ ,  Meizi JIAO ,  Suddhasattwa NAD ,  Telesphor KAMGAING

IPC分类号： H01L23/498 ,  H01F17/00 ,  H01F27/40 ,  H01L49/02 ,  H01F27/28 ,  H01F41/04 ,  H01G4/33 ,  H01L21/48 ,  H01L23/66

摘要： Embodiments of the invention include an electrical package and methods of forming the package. In one embodiment, a transformer may be formed in the electrical package. The transformer may include a first conductive loop that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first conductive loop from a second conductive loop that is formed in the package. Additional embodiments of the invention include forming a capacitor formed in the electrical package. For example, the capacitor may include a first capacitor plate that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first capacitor plate form a second capacitor plate that is formed in the package. The thin dielectric spacer material in the transformer and capacitor allow for increased coupling factors and capacitance density in electrical components.

公开(公告)号：US20200286660A1

公开(公告)日：2020-09-10

申请号：US16291328

申请日：2019-03-04

申请人： Intel Corporation

发明人： Telesphor KAMGAING

IPC分类号： H01F17/00 ,  H05K1/18 ,  H05K1/02 ,  H05K1/16 ,  H01L23/00 ,  H01L23/498 ,  H01L23/64

摘要： In an embodiment, an inductor comprises a first trace, where the first trace has a first end and a second end, and where the first trace extends along a first plane, and a first conductive path over the first end of the first trace, where the first conductive path extends along a second plane that is substantially orthogonal to the first plane. In an embodiment, the inductor further comprises a second conductive path over the second end of the first trace, where the second conductive path extends along a third plane that is substantially parallel to the second plane, and a second trace over the first conductive path, where the second trace extends along a fourth plane that substantially parallel to the first plane. In an embodiment, the inductor further comprises a third trace over the second conductive path, where the third trace extends along the fourth plane.