知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

9 records (took 0.017 seconds)

    Analyzing potential benefits of vectorization
    3.
    发明授权
    Analyzing potential benefits of vectorization 有权
    分析矢量化的潜在优势

    公开(公告)号：US09170789B2

    公开(公告)日：2015-10-27

    申请号：US13997140

    申请日：2013-03-05

    Applicant: INTEL CORPORATION

    Inventor： Ruchira Sasanka ,  Jeffrey J. Cook ,  Abhinav Das ,  Jayaram Bobba ,  Michael R. Greenfield ,  Suresh Srinivas

    IPC: G06F9/44 ,  G06F9/45

    CPC classification number: G06F8/41 ,  G06F8/456

    Abstract: Embodiments of computer-implemented methods, systems, computing devices, and computer-readable media (transitory and non-transitory) are described herein for analyzing execution of a plurality of executable instructions and, based on the analysis, providing an indication of a benefit to be obtained by vectorization of at least a subset of the plurality of executable instructions. In various embodiments, the analysis may include identification of the subset of the plurality of executable instructions suitable for conversion to one or more single-instruction multiple-data (“SIMD”) instructions.

    Abstract translation: 本文描述了计算机实现的方法，系统，计算设备和计算机可读介质（暂时性和非暂时性）的实施例，用于分析多个可执行指令的执行，并且基于该分析，提供对 可以通过对多个可执行指令的至少一个子集进行向量化来获得。 在各种实施例中，分析可以包括识别适合于转换成一个或多个单指令多数据（“SIMD”）指令的多个可执行指令的子集。

    METHODS AND APPARATUS TO BYPASS OBJECT LOCKS
    4.
    发明申请
    METHODS AND APPARATUS TO BYPASS OBJECT LOCKS 有权
    旁路对象锁的方法和装置

    公开(公告)号：US20150169384A1

    公开(公告)日：2015-06-18

    申请号：US14635790

    申请日：2015-03-02

    Applicant: Intel Corporation

    Inventor： Suresh Srinivas ,  Stephen H. Dohrmann ,  Mingqiu Sun ,  Uma Srinivasan ,  Ravi Rajwar ,  Konrad K. Lai

    IPC: G06F9/52

    CPC classification number: G06F9/528 ,  G06F8/458 ,  G06F9/3842 ,  G06F9/45516 ,  G06F9/526 ,  G06F17/30168 ,  G06F17/30362 ,  Y10S707/99938

    Abstract: Example methods and apparatus to manage object locks are disclosed. A disclosed example method includes intercepting a processor request to apply the lock on the object, identifying a performance history of the object based on a number of instances of contention, reducing computing resources of the processor by, when the number of instances is below a threshold value, generating a lock bypass for the object to cause speculative execution of target code within the object, and preventing speculative execution by applying the lock on the object when the number of instances is above the threshold value.

    Abstract translation: 公开了用于管理对象锁的示例性方法和装置。 所公开的示例性方法包括拦截处理器请求以对对象施加锁定，基于竞争的多个实例来识别对象的性能历史，当实例数低于阈值时，减少处理器的计算资源 产生对象的锁旁路，以引起对象内的目标代码的推测执行，并且当实例数高于阈值时，通过对对象应用锁来防止推测执行。

    Transitioning from source instruction set architecture (ISA) code to translated code in a partial emulation environment
    5.
    发明授权
    Transitioning from source instruction set architecture (ISA) code to translated code in a partial emulation environment 有权
    从部分仿真环境中的源代码指令集架构（ISA）代码转换为翻译代码

    公开(公告)号：US08762127B2

    公开(公告)日：2014-06-24

    申请号：US13785561

    申请日：2013-03-05

    Applicant: Intel Corporation

    Inventor： Sebastian Winkel ,  Koichi Yamada ,  Suresh Srinivas ,  James E. Smith

    IPC: G06F9/445 ,  G06F9/30 ,  G06F12/08

    CPC classification number: G06F9/3017 ,  G06F9/455 ,  G06F12/0873 ,  G06F12/0875

    Abstract: In one embodiment, a processor can operate in multiple modes, including a direct execution mode and an emulation execution mode. More specifically, the processor may operate in a partial emulation model in which source instruction set architecture (ISA) instructions are directly handled in the direct execution mode and translated code generated by an emulation engine is handled in the emulation execution mode. Embodiments may also provide for efficient transitions between the modes using information that can be stored in one or more storages of the processor and elsewhere in a system. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，处理器可以在多种模式下操作，包括直接执行模式和仿真执行模式。 更具体地，处理器可以在部分仿真模型中操作，其中以直接执行模式直接处理源指令集架构（ISA）指令，并且在仿真执行模式中处理由仿真引擎生成的转换代码。 实施例还可以使用可以存储在处理器的一个或多个存储器和系统中的其他地方的信息来提供模式之间的有效转换。 描述和要求保护其他实施例。

    INTER-ARCHITECTURE COMPATABILITY MODULE TO ALLOW CODE MODULE OF ONE ARCHITECTURE TO USE LIBRARY MODULE OF ANOTHER ARCHITECTURE
    7.
    发明申请
    INTER-ARCHITECTURE COMPATABILITY MODULE TO ALLOW CODE MODULE OF ONE ARCHITECTURE TO USE LIBRARY MODULE OF ANOTHER ARCHITECTURE 审中-公开
    允许单一架构代码模块使用其他架构的图书馆模块的架构兼容性模块

    公开(公告)号：US20150277867A1

    公开(公告)日：2015-10-01

    申请号：US14229795

    申请日：2014-03-28

    Applicant: Intel Corporation

    Inventor： Niranjan Hasabnis ,  Suresh Srinivas ,  Jayaram Bobba

    IPC: G06F9/45 ,  G06F9/445

    CPC classification number: G06F8/433 ,  G06F9/44521 ,  G06F9/4552

    Abstract: An inter-architecture compatibility apparatus of an aspect includes a control flow transfer reception module to receive a first call procedure operation, intended for a first architecture library module, from a first architecture code module. The first call procedure operation involves a first plurality of input parameters. An application binary interface (ABI) change module is coupled with the control flow transfer reception module. The ABI change module makes ABI changes to convert the first call procedure operation involving the first plurality of input parameters to a corresponding second call procedure operation involving a second plurality of input parameters. The second call procedure operation is compatible with a second architecture library module. A control flow transfer output module is coupled with the ABI change module. The control flow transfer output module provides the second call procedure operation to the second architecture library module.

    Abstract translation: 一方面的架构间兼容性装置包括控制流传输接收模块，用于从第一架构代码模块接收针对第一架构库模块的第一呼叫过程操作。 第一呼叫过程操作涉及第一多个输入参数。 应用二进制接口（ABI）更改模块与控制流传输接收模块耦合。 ABI更改模块使ABI改变，将涉及第一多个输入参数的第一呼叫过程操作转换为涉及第二多个输入参数的相应的第二呼叫过程操作。 第二个调用过程操作与第二个架构库模块兼容。 控制流传输输出模块与ABI更换模块耦合。 控制流传输输出模块向第二架构库模块提供第二呼叫过程操作。

    Inter-architecture compatability module to allow code module of one architecture to use library module of another architecture
    9.
    发明授权
    Inter-architecture compatability module to allow code module of one architecture to use library module of another architecture 有权

    公开(公告)号：US10120663B2

    公开(公告)日：2018-11-06

    申请号：US14229795

    申请日：2014-03-28

    Applicant: Intel Corporation

    Inventor： Niranjan Hasabnis ,  Suresh Srinivas ,  Jayaram Bobba

    IPC: G06F9/44 ,  G06F9/45 ,  G06F8/41 ,  G06F9/445 ,  G06F9/455

    Abstract: An inter-architecture compatibility apparatus of an aspect includes a control flow transfer reception module to receive a first call procedure operation, intended for a first architecture library module, from a first architecture code module. The first call procedure operation involves a first plurality of input parameters. An application binary interface (ABI) change module is coupled with the control flow transfer reception module. The ABI change module makes ABI changes to convert the first call procedure operation involving the first plurality of input parameters to a corresponding second call procedure operation involving a second plurality of input parameters. The second call procedure operation is compatible with a second architecture library module. A control flow transfer output module is coupled with the ABI change module. The control flow transfer output module provides the second call procedure operation to the second architecture library module.

Patent Agency Ranking