Abstract:
Embodiments described herein provide a system, method, and apparatus to accelerate reduce operations in a graphics processor. One embodiment provides an apparatus including one or more processors, the one or more processors including a first logic unit to perform a merged write, barrier, and read operation in response to a barrier synchronization request from a set of threads in a work group, synchronize the set of threads, and report a result of an operation specified in association with the barrier synchronization request.
Abstract:
In an embodiment, a device includes a processor to initialize a first wireless communication path with a computation device and initialize a second wireless communication path with a secure network, receive a first request for identification data from the secure network via the second wireless communication path to enable access to the secure network, and automatically pass the received request data to the computation device via the first wireless communication path. The processor is further to receive the identification data from the computation device responsive to the request, provide the received identification data to the secure network via the second wireless communication path, and receive session key(s) at the device from the secure network that enables the device to access the secure network. Other embodiments are described and claimed.
Abstract:
Techniques for modifying a transmission rate of a device having a plurality of transmission rate options are described herein. The techniques include a method comprising receiving data from a sensor indicating movement of an electronic device, the electronic device having a plurality of transmission rate options. Fail ratio metrics are gathered. The fail ratio metrics indicate a ratio of failed transmissions to successful transmissions for rate option during device movement. The method includes determining whether a given rate option has a fail ratio above a predetermined threshold; and, if so, disabling the given rate option while the device is moving.
Abstract:
Described is a machine-readable storage medium having instructions stored thereon, that when executed, cause a processor to perform a method which comprises: grouping two or more work groups to form a super-workgroup; and partitioning a portion of a memory space into one or more super-shared local memories (Super-SLMs), wherein the memory space shared within the super-workgroup forms at least one Super-SLM of the one or more Super-SLMs. Described is an apparatus which comprises: a plurality of execution units; a cache memory having a portion characterized as a SLM which is shared with the plurality of execution units at least one of which is to operate on a work group of a sub-slice, wherein the SLM is shared within the work group; and at least one Super-SLM for providing shared memory accessible by different work groups in the sub-slice, wherein the at least one of the execution units is to operate on the different work groups.
Abstract:
Embodiments described herein provide a system, method, and apparatus to accelerate reduce operations in a graphics processor. One embodiment provides an apparatus including one or more processors, the one or more processors including a first logic unit to perform a merged write, barrier, and read operation in response to a barrier synchronization request from a set of threads in a work group, synchronize the set of threads, and report a result of an operation specified in association with the barrier synchronization request.
Abstract:
Various systems and methods for configuring a smartphone based on a user's sleep status are described herein. A compute device includes a determination module to determine a physiological state of a person and a configuration module to configure a quiet mode of the compute device based on the physiological state of the person.
Abstract:
Embodiments described herein provide a system, method, and apparatus to accelerate reduce operations in a graphics processor. One embodiment provides an apparatus including one or more processors, the one or more processors including a first logic unit to perform a merged write, barrier, and read operation in response to a barrier synchronization request from a set of threads in a work group, synchronize the set of threads, and broadcast a result of an operation specified in association with the barrier synchronization request.
Abstract:
Methods and apparatus to improve shared memory efficiency are described. In an embodiment, a first version of a code to access one or more registers as shared local memory is compiled. A second version of the same code is also compiled to access a cache as the shared local memory. The first version of the code is executed in response to comparison of a work group size of the code with a threshold value. Other embodiments are also disclosed and claimed.
Abstract:
In one example, a system for managing power states can include a processor to detect a power state transition operation and detect historical callback information for each of a plurality of drivers of the system. The processor can also sort the plurality of drivers into a plurality of driver groups based on the historical callback information and execute the power state transition operation by transmitting a plurality of power state instructions for each driver to a plurality of processors based on the plurality of driver groups.
Abstract:
Techniques for modifying a transmission rate of a device having a plurality of transmission rate options are described herein. The techniques include a method comprising receiving data from a sensor indicating movement of an electronic device, the electronic device having a plurality of transmission rate options. Fail ratio metrics are gathered. The fail ratio metrics indicate a ratio of failed transmissions to successful transmissions for rate option during device movement. The method includes determining whether a given rate option has a fail ratio above a predetermined threshold; and, if so, disabling the given rate option while the device is moving.