FEEDFORWARD DISTORTION CANCELLATION APPARATUS AND METHOD

    公开(公告)号:US20240187025A1

    公开(公告)日:2024-06-06

    申请号:US18528530

    申请日:2023-12-04

    IPC分类号: H04B1/04

    CPC分类号: H04B1/0475 H04B2001/0441

    摘要: An apparatus and a method include receiving, by a transmitter integrated circuit (IC) having a serial data communications interface, a digital transmit signal, and generating a first signal that is an analog radio frequency (RF) modulated signal based on the digital transmit signal and a second signal that is a phase-offset version of the first signal. An amplified signal is generated by amplifying the first signal and includes an amplified version of the first signal and an out-of-band distortion signal. A reduced-power signal is generated from the amplified signal. The reduced-power signal is subtracted from the second signal to output a distortion cancellation signal. An amplified distortion cancellation signal is generated by amplifying the distortion cancellation signal using an error amplifier. The amplified distortion cancellation signal and a delayed version of the amplified signal are combined to output an amplified version of the first signal with reduced distortion.

    Hierarchical Beamformer
    2.
    发明公开

    公开(公告)号:US20240007160A1

    公开(公告)日:2024-01-04

    申请号:US18346192

    申请日:2023-06-30

    IPC分类号: H04B7/06 H04B7/08

    CPC分类号: H04B7/0617 H04B7/086

    摘要: An apparatus and method for uplink and/or downlink beamforming operation are disclosed. In one embodiment, each of a plurality of distributed secondary beamformer processors is associated with a respective region of an antenna array and associated with a respective beamforming submatrix. Each transmit or receive beamforming submatrix contains beamforming combining weights associated with antenna elements in the respective region of the antenna array. Further, each secondary beamformer processor uses the respective beamforming submatrix and a respective set of frequency-domain IQ data points (representing user data layers for transmission, or received FDIQ data from a corresponding set of transceiver ICs) to form a respective plurality of sets of beamformed frequency-domain IQ data points.

    System and method for low-power wireless beacon monitor

    公开(公告)号:US11297575B2

    公开(公告)日:2022-04-05

    申请号:US16900650

    申请日:2020-06-12

    申请人: Innophase, Inc.

    IPC分类号: H04W52/02 H04W88/08 H04W48/20

    摘要: Selectively enabling an amplitude processing circuit and a phase processing circuit of a wireless station's polar receiver with respect to reception of a beacon signal. Such systems and methods may include sequentially demodulating symbols of the received beacon signal using at least the phase processing circuit to detect a traffic indication signal value in a data payload portion of the received beacon signal. Upon detecting a condition indicating no data traffic for the wireless station, the phase processing circuit may be turned off. The polar receiver may demodulate symbols of the received beacon signal and upon detecting a beacon preamble symbol sequence, shut off the amplitude processing circuit and set the amplitude to a fixed value. The phase processing circuit in conjunction with the fixed amplitude value may be used to demodulate symbols of the beacon signal.

    Systems and methods for maximizing power efficiency of a digital power amplifier in a polar transmitter

    公开(公告)号:US10826738B2

    公开(公告)日:2020-11-03

    申请号:US16241842

    申请日:2019-01-07

    申请人: Innophase Inc.

    发明人: Jun Pan Yang Xu

    摘要: A polar transmitter including a digital power amplifier cell that includes a first circuit and an amplifier circuit. The first circuit is configured to receive a phase modulated carrier signal and to generate a PMOS control signal and an NMOS control signal such that the PMOS control signal and the NMOS control signal have different duty cycles. The amplifier circuit is configured to receive the PMOS control signal at a PMOS transistor and the NMOS control signal at an NMOS transistor. The first circuit is configured to align the PMOS control signal and the NMOS control signal with respect to one another such that a time that the NMOS transistor and the PMOS transistor of the amplifier circuit are simultaneously conducting is minimized. The amplifier circuit is configured to generate an amplified modulated carrier signal in response to the PMOS and NMOS control signals.

    ADAPTIVE DIGITAL PREDISTORTION FOR POLAR TRANSMITTER

    公开(公告)号:US20180287569A1

    公开(公告)日:2018-10-04

    申请号:US15654507

    申请日:2017-07-19

    申请人: Innophase, Inc.

    摘要: A predistortion circuit receives an input polar signal to be transmitted, including an input amplitude signal and an input phase signal. The input polar signal is predistorted using at least one predistortion parameter selected from a lookup table. A phase-and-amplitude modulated radio-frequency signal is generated corresponding to the predistorted polar signal. A copy of the generated radio-frequency signal is provided to a polar receiver. The polar receiver is operated to generate, from the copy of the radio-frequency signal and without information relating to the generated transmit signal, a feedback polar signal including a feedback amplitude signal and a feedback phase signal. The feedback polar signal is compared to the input polar signal, the lookup table is updated in response to the comparison.

    WIDEBAND POLAR RECEIVER ARCHITECTURE AND SIGNAL PROCESSING METHODS

    公开(公告)号:US20170163273A1

    公开(公告)日:2017-06-08

    申请号:US14957134

    申请日:2015-12-02

    申请人: Innophase Inc.

    IPC分类号: H03L7/24 H04L27/22 H04B1/16

    摘要: Wideband polar receivers and method of operation are described. A phase-modulated input signal is received at a polar receiver that includes an injection-locked oscillator. The injection-locked oscillator includes a plurality of injection points. Based on the frequency of the input signal, a particular Nth harmonic is selected, and the input signal is injected at the set of injection points corresponding to the selected Nth harmonic. The injection-locked oscillator generates an oscillator output signal, and the phase of the input signal is determined from the phase of the oscillator output signal. In some embodiments, the oscillator output signal is frequency-multiplied by N, mixed with the input signal, and filtered for use in amplitude detection. The input signal is decoded based on the phase and amplitude information.

    WIDEBAND POLAR RECEIVER ARCHITECTURE AND SIGNAL PROCESSING METHODS

    公开(公告)号:US20170163272A1

    公开(公告)日:2017-06-08

    申请号:US14957131

    申请日:2015-12-02

    申请人: Innophase Inc.

    IPC分类号: H03L7/24 H04L27/22 H04B1/16

    CPC分类号: H03L7/24 H04L27/22

    摘要: Wideband polar receivers and method of operation are described. A phase-modulated input signal is received at a polar receiver that includes an injection-locked oscillator. The injection-locked oscillator includes a plurality of injection points. Based on the frequency of the input signal, a particular Nth harmonic is selected, and the input signal is injected at the set of injection points corresponding to the selected Nth harmonic. The injection-locked oscillator generates an oscillator output signal, and the phase of the input signal is determined from the phase of the oscillator output signal. In some embodiments, the oscillator output signal is frequency-multiplied by N, mixed with the input signal, and filtered for use in amplitude detection. The input signal is decoded based on the phase and amplitude information.

    Apparatus and Method for Digital to Analog Conversion with Current Mirror Amplification
    10.
    发明申请
    Apparatus and Method for Digital to Analog Conversion with Current Mirror Amplification 有权
    用电流镜放大器进行数模转换的装置和方法

    公开(公告)号:US20150222286A1

    公开(公告)日:2015-08-06

    申请号:US14173595

    申请日:2014-02-05

    申请人: Innophase, Inc.

    发明人: Xuejun Zhang Yang Xu

    摘要: A DAC using current mirrors suitable for use in a modulator. Embodiments include a current-generating circuit to provide an information signal; a bias current source; a current mirror having a mirror input transistor connected to the current generating circuit and the bias current source, and being driven by the bias current and the varying current signal and having a corresponding varying voltage signal at a control terminal; a signal shaping filter interposed between the mirror input transistor and an output mirror transistor configured to limit a bandwidth of the varying voltage signal; the output mirror transistor configured to generate a band-limited varying current signal and a mirrored bias current; and, a mirrored bias current reduction circuit connected to the output mirror transistor configured to reduce the mirrored bias current.

    摘要翻译: 使用适合用于调制器的电流镜的DAC。 实施例包括提供信息信号的电流产生电路; 偏置电流源; 电流镜,其具有连接到电流产生电路和偏置电流源的反射镜输入晶体管,并由偏置电流和变化的电流信号驱动,并且在控制端处具有相应的变化电压信号; 插入在所述反射镜输入晶体管和被配置为限制所述变化的电压信号的带宽的输出镜像晶体管之间的信号整形滤波器; 所述输出镜晶体管被配置为产生带限变化电流信号和镜像偏置电流; 以及连接到输出镜晶体管的镜像偏置电流降低电路,被配置为减少镜像偏置电流。