Abstract:
A prepreg resin comprising: (a) 98 to 40% by weight based on the total weight of components (a) and (b), of a curable polyphenylene ether resin; (b) 2 to 60% by weight based on the total weight of components (a) and (b), of at least one cyanurate selected from the group consisting of triallyl isocyanurate and triallyl cyanurate; (c) a polymerization initiator comprised of a peroxide functionalized polymer, said peroxide functionalized polymer being fragmented by heat to a plurality of free radical moieties, such as t-butoxide moieties, and a relatively inert moiety having a molecular weight greater than about 1,000. The invention also encompasses a cured resin either as a coating on a substrate, without fiberglass cloth embedded, or a cured prepreg with fiberglass cloth embedded and a method of forming the same.
Abstract:
A substrate and a method of making the substrate is provided. The substrate includes a layer of metal with at least one through hole therein, the layer of metal having an adhesion promoting layer thereon. A layer of a partially cured low-loss polymer or polymer precursor is positioned on the adhesion promoting layer and a plurality of conductive circuit lines are positioned on a portion of the partially cured dielectric layer. The substrate can be used as a building block in the fabrication of a multilayered printed circuit board.
Abstract:
A method of forming a capacitive core structure and of forming a circuitized printed wiring board from the core structure and the resulting structures are provided. The capacitive core structure is formed by providing a central conducting plane of a sheet of conductive material and forming at least one clearance hole in the central conducting plane. First and second external conducting planes are laminated to opposite sides of the ground plane with a film of dielectric material between each of the first and second external planes and the central conducting plane. At least one clearance hole is formed in each of the first and second external planes. A circuitized wiring board structure can be formed by laminating a capacitive core structure between two circuitized structures. The invention also relates to the structures formed by these methods.
Abstract:
A method for producing small pitch z-axis electrical interconnections in layers of dielectric materials which are applied to printed wiring boards and diverse electronic packages. A method for parallel fabrication of intermediate structures which are subsequently jointed to form a final structure. In addition there is provided a z-interconnected electrical structure, employing dielectric materials such as resin coated copper, employable in the manufacture of diverse type of electronic packages, including printed wiring boards (PWBs), substrates, multi-chip modules and the like.
Abstract:
The present invention provides a method of temporarily adhering a stack of sheets together to facilitate drilling a hole through the stack of sheets. The method includes using a temporary adhesive that prevents burring while drilling a hole through the stack.