公开(公告)号：US20200301831A1

公开(公告)日：2020-09-24

申请号：US16360254

申请日：2019-03-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Chad G. Wilson ,  Robert J Sonnelitter, III ,  Tim Bronson ,  Ekaterina M. Ambroladze ,  Hieu T Huynh ,  Jason D Kohl ,  Chakrapani Rayadurgam

IPC: G06F12/084

Abstract: Methods and systems for cache management are provided. Aspects include providing a drawer including a plurality of clusters, each of the plurality of clusters including a plurality of processor each having one or more cores, wherein each of the one or more cores shares a first cache memory, providing a second cache memory shared among the plurality of clusters, and receiving a cache line request from one of the one or more cores to the first cache memory, wherein the first cache memory sends a request to a memory controller to retrieve the cache line from a memory, store the cache line in the first cache memory, create a directory state associated with the cache line, and provide the directory state to the second cache memory to create a directory entry for the cache line.

公开(公告)号：US11989128B1

公开(公告)日：2024-05-21

申请号：US18066575

申请日：2022-12-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Winston Herring ,  Gregory William Alexander ,  Timothy Bronson ,  Jason D Kohl

IPC: G06F12/08 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/0862

CPC classification number: G06F12/084 ,  G06F12/0833 ,  G06F12/0862

Abstract: A node of the computing environment obtains an exclusive fetch request of a cache line shared by, at least, the node and a manager node of the computing environment. The exclusive fetch request includes a state indication regarding processing of the exclusive fetch request by the manager node. The node processes the exclusive fetch request, based on the state indication included with the exclusive fetch request regarding processing of the exclusive fetch request by the manager node.

公开(公告)号：US11907132B2

公开(公告)日：2024-02-20

申请号：US17701777

申请日：2022-03-23

Applicant: International Business Machines Corporation

Inventor： Jason D Kohl ,  Gregory William Alexander ,  Timothy Bronson ,  Akash V. Giri ,  Winston Herring

IPC: G06F12/0895

CPC classification number: G06F12/0895 ,  G06F2212/622

Abstract: A method for managing designated authority status in a cache line includes identifying an initial designated authority (DA) member cache for a cache line, transferring DA status from the initial DA member cache to a new DA member cache, determining whether the new DA member cache is active, indicating a final state of the initial DA cache responsive to determining that the new DA member cache is active, and overriding a DA state in a cache control structure in a directory. A method for managing cache accesses during a designated authority transfer includes receiving a designated authority (DA) status transfer request, receiving an indication that a first cache will invalidate its copy of the cache line, allowing a second cache to assume DA status for the cache line, and denying access to the first cache's copy of the cache line until invalidation by the first cache is complete.

公开(公告)号：US20200301832A1

公开(公告)日：2020-09-24

申请号：US16360468

申请日：2019-03-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kevin Lopes ,  Deanna P.D. Berger ,  Jason D Kohl ,  Robert J Sonnelitter, III

IPC: G06F12/084 ,  G06F3/06

Abstract: Methods and systems for secure storage protection for memory operations are provided. Aspects include providing a drawer comprising a plurality of clusters, each of the plurality of clusters comprising a plurality of processors, wherein each of the plurality of clusters share a first cache memory, providing a cluster shared cache integrated circuit to manage a second cache memory shared among the plurality of clusters, providing a system memory associated with each of the plurality of clusters, receiving, by a memory controller, a memory operation request from one of the plurality of processors, wherein the memory operation includes a store command, and wherein the memory controller is configured to perform the memory operation and atomically write a secure storage key for the memory operation with the store command of the memory operation.

公开(公告)号：US11782836B1

公开(公告)日：2023-10-10

申请号：US17657169

申请日：2022-03-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jason D Kohl ,  Winston Herring ,  Tu-An T. Nguyen ,  Gregory William Alexander ,  Timothy Bronson ,  Christian Jacobi

IPC: G06F12/084 ,  G06F9/38 ,  G06F12/0815

CPC classification number: G06F12/084 ,  G06F9/3834 ,  G06F12/0815

Abstract: A primary controller has authority of a cache line associated with a fetch and manages a second cache line request from a different and non-associated secondary requesting entity. A secondary controller, associated with the secondary requesting entity, is granted authority of the cache line and further manages multiple subsequent simultaneous or overlapping requests for the cache line from different non-associated subsequent requesting entities by maintaining authority of the cache line, by granting read-only access to the cache line to respective subsequent controllers, each associated with a different subsequent requesting entity, and by passing a non-authority token to each of the respective subsequent controllers.

公开(公告)号：US10901902B2

公开(公告)日：2021-01-26

申请号：US16360254

申请日：2019-03-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Chad G. Wilson ,  Robert J Sonnelitter, III ,  Tim Bronson ,  Ekaterina M. Ambroladze ,  Hieu T Huynh ,  Jason D Kohl ,  Chakrapani Rayadurgam

IPC: G06F12/10 ,  G06F12/084

Abstract: Methods and systems for cache management are provided. Aspects include providing a drawer including a plurality of clusters, each of the plurality of clusters including a plurality of processor each having one or more cores, wherein each of the one or more cores shares a first cache memory, providing a second cache memory shared among the plurality of clusters, and receiving a cache line request from one of the one or more cores to the first cache memory, wherein the first cache memory sends a request to a memory controller to retrieve the cache line from a memory, store the cache line in the first cache memory, create a directory state associated with the cache line, and provide the directory state to the second cache memory to create a directory entry for the cache line.

公开(公告)号：US10891232B2

公开(公告)日：2021-01-12

申请号：US16360468

申请日：2019-03-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kevin Lopes ,  Deanna P. D. Berger ,  Jason D Kohl ,  Robert J Sonnelitter, III

IPC: G06F12/00 ,  G06F12/084 ,  G06F3/06

Abstract: Methods and systems for secure storage protection for memory operations are provided. Aspects include providing a drawer comprising a plurality of clusters, each of the plurality of clusters comprising a plurality of processors, wherein each of the plurality of clusters share a first cache memory, providing a cluster shared cache integrated circuit to manage a second cache memory shared among the plurality of clusters, providing a system memory associated with each of the plurality of clusters, receiving, by a memory controller, a memory operation request from one of the plurality of processors, wherein the memory operation includes a store command, and wherein the memory controller is configured to perform the memory operation and atomically write a secure storage key for the memory operation with the store command of the memory operation.

公开(公告)号：US10802966B2

公开(公告)日：2020-10-13

申请号：US16275436

申请日：2019-02-14

Applicant: International Business Machines Corporation

Inventor： Arun Iyengar ,  Tim Bronson ,  Michael Andrew Blake ,  Vesselina Papazova ,  Arthur o'Neill ,  Jason D Kohl ,  Kenneth Klapproth

IPC: G06F12/0806 ,  G06F12/0817

Abstract: Provided are systems, methods, and media for simultaneous, non-atomic request processing of snooped operations of a broadcast scope within a SMP system. An example method includes detecting, by a first controller, based on a set of coherency resolution conditions, whether there are coherency resolution problems between two snooped operations. The method includes in response to detecting, by the first controller, that coherency resolution problems will not result, transmitting, from the first controller to a second controller, an indication signal indicating that coherency resolution problems will not result from the operation. The set of coherency resolution conditions includes: (a) detecting that a second operation of the two snooped operations operation is of a predetermined type, (b) detecting at time of snooping of the second operation that a directory state does not allow for exclusive data, and (c) detecting that the first controller has started committing to an update.