Abstract:
An interconnect structure for a semiconductor device includes an organic, low dielectric constant (low-k) dielectric layer formed over a lower metallization level. A via formed is within the low-k dielectric layer, the via connecting a lower metallization line formed in the lower metallization level with an upper metallization line formed in an upper metallization level. The via is surrounded by a structural collar selected from a material having a coefficient of thermal expansion (CTE) so as to protect the via from shearing forces following a thermal expansion of the low-k dielectric layer.
Abstract:
A semiconductor wafer provided with a thermosetting porous insulating film, wherein the insulating film is made porous, cured and polymerized on the wafer. The film is characterized by a very low dielectric constant based on its constituency and porosity, the latter property of which is caused by the inclusion of liquid or supercritical carbon dioxide in the polymeric reaction mixture.
Abstract:
An advanced back-end-of-line (BEOL) interconnect structure having a hybrid dielectric is disclosed. The inter-layer dielectric (ILD) for the via level is preferably different from the ILD for the line level. In a preferred embodiment, the via-level ILD is formed of a low-k SiCOH material, and the line-level ILD is formed of a low-k polymeric thermoset material.