公开(公告)号：US20160005735A1

公开(公告)日：2016-01-07

申请号：US14320760

申请日：2014-07-01

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Gregory Costrini ,  Ravikumar Ramachandran ,  Reinaldo A. Vega ,  Richard S. Wise

IPC: H01L27/088 ,  H01L29/51 ,  H01L29/06 ,  H01L21/311 ,  H01L21/306 ,  H01L21/308 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/762

CPC classification number: H01L29/66545 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/823431 ,  H01L21/823462 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/517 ,  H01L29/6681

Abstract: Semiconductor-oxide-containing gate dielectrics can be formed on surfaces of semiconductor fins prior to formation of a disposable gate structure. A high dielectric constant (high-k) dielectric spacer can be formed to protect each semiconductor-oxide-containing gate dielectric. Formation of the high-k dielectric spacers may be performed after formation of gate cavities by removal of disposable gate structures, or prior to formation of disposable gate structures. The high-k dielectric spacers can be used as protective layers during an anisotropic etch that vertically extends the gate cavity, and can be removed after vertical extension of the gate cavities. A subset of the semiconductor-oxide-containing gate dielectrics can be removed for formation of high-k gate dielectrics for first type devices, while another subset of the semiconductor-oxide-containing gate dielectrics can be employed as gate dielectrics for second type devices. The vertical extension of the gate cavities increases channel widths in the fin field effect transistors.

Abstract translation: 在形成一次性栅极结构之前，可以在半导体鳍片的表面上形成含半导体氧化物的栅极电介质。 可以形成高介电常数（高k）电介质间隔物以保护每个含半导体氧化物的栅极电介质。 高k电介质间隔物的形成可以在通过移除一次性栅极结构或者在形成一次性栅极结构之前形成栅极空腔之后进行。 高k电介质间隔物可以在垂直延伸栅极腔的各向异性蚀刻期间用作保护层，并且可以在栅腔的垂直延伸之后被去除。 可以去除含半导体氧化物的栅极电介质的子集，以形成用于第一类型器件的高k栅极电介质，而含半导体氧化物的栅极电介质的另一子集可用作第二类型器件的栅极电介质。 栅极腔的垂直延伸增加了鳍状场效应晶体管中的沟道宽度。

公开(公告)号：US09818741B2

公开(公告)日：2017-11-14

申请号：US14755404

申请日：2015-06-30

Applicant: International Business Machines Corporation

Inventor： Michael V. Aquilino ,  Veeraraghavan S. Basker ,  Kangguo Cheng ,  Gregory Costrini ,  Ali Khakifirooz ,  Byeong Y. Kim ,  William L. Nicoll ,  Ravikumar Ramachandran ,  Reinaldo A. Vega ,  Hanfei Wang ,  Xinhui Wang

IPC: H01L27/108 ,  H01L27/08 ,  H01L27/12

CPC classification number: H01L27/1087 ,  H01L27/0817 ,  H01L27/10826 ,  H01L27/10829 ,  H01L27/10867 ,  H01L27/10879 ,  H01L27/1203

Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.

公开(公告)号：US09577068B2

公开(公告)日：2017-02-21

申请号：US15235935

申请日：2016-08-12

Applicant: International Business Machines Corporation

Inventor： Gregory Costrini ,  Ravikumar Ramachandran ,  Reinaldo A. Vega ,  Richard S. Wise

IPC: H01L27/088 ,  H01L29/51 ,  H01L21/306 ,  H01L29/66 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06

CPC classification number: H01L29/66545 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/823431 ,  H01L21/823462 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/517 ,  H01L29/6681

Abstract: Semiconductor-oxide-containing gate dielectrics can be formed on surfaces of semiconductor fins prior to formation of a disposable gate structure. A high dielectric constant (high-k) dielectric spacer can be formed to protect each semiconductor-oxide-containing gate dielectric. Formation of the high-k dielectric spacers may be performed after formation of gate cavities by removal of disposable gate structures, or prior to formation of disposable gate structures. The high-k dielectric spacers can be used as protective layers during an anisotropic etch that vertically extends the gate cavity, and can be removed after vertical extension of the gate cavities. A subset of the semiconductor-oxide-containing gate dielectrics can be removed for formation of high-k gate dielectrics for first type devices, while another subset of the semiconductor-oxide-containing gate dielectrics can be employed as gate dielectrics for second type devices. The vertical extension of the gate cavities increases channel widths in the fin field effect transistors.

Abstract translation: 在形成一次性栅极结构之前，可以在半导体鳍片的表面上形成含半导体氧化物的栅极电介质。 可以形成高介电常数（高k）电介质间隔物以保护每个含半导体氧化物的栅极电介质。 高k电介质间隔物的形成可以在通过移除一次性栅极结构或者在形成一次性栅极结构之前形成栅极空腔之后进行。 高k电介质间隔物可以在垂直延伸栅极腔的各向异性蚀刻期间用作保护层，并且可以在栅腔的垂直延伸之后被去除。 可以去除含半导体氧化物的栅极电介质的子集，以形成用于第一类型器件的高k栅极电介质，而含半导体氧化物的栅极电介质的另一子集可用作第二类型器件的栅极电介质。 栅极腔的垂直延伸增加了鳍状场效应晶体管中的沟道宽度。

公开(公告)号：US20170005098A1

公开(公告)日：2017-01-05

申请号：US14755404

申请日：2015-06-30

Applicant: International Business Machines Corporation

Inventor： Michael V. Aquilino ,  Veeraraghavan S. Basker ,  Kangguo Cheng ,  Gregory Costrini ,  Ali Khakifirooz ,  Byeong Y. Kim ,  William L. Nicoll ,  Ravikumar Ramachandran ,  Reinaldo A. Vega ,  Hanfei Wang ,  Xinhui Wang

IPC: H01L27/108

CPC classification number: H01L27/1087 ,  H01L27/0817 ,  H01L27/10826 ,  H01L27/10829 ,  H01L27/10867 ,  H01L27/10879 ,  H01L27/1203

Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.

Abstract translation: 在形成半导体鳍片和导电带结构的横向接触对之后，具有垂直接触嵌入衬底中的深沟槽电容器的基部和与半导体翅片横向接触的翅片部分的导电带结构，形成在深度的侧壁上的导电尖峰 沟槽被移除或者被推入深沟槽中。 随后，在导电带结构的基部的至少一部分上形成抑制其上的半导体材料的外延生长的电介质盖。 电介质盖可以形成在具有台阶结构的整个基部上或基部的远侧部分上。

公开(公告)号：US10177154B2

公开(公告)日：2019-01-08

申请号：US15691182

申请日：2017-08-30

Applicant: International Business Machines Corporation

Inventor： Michael V. Aquilino ,  Veeraraghavan S. Basker ,  Kangguo Cheng ,  Gregory Costrini ,  Ali Khakifirooz ,  Byeong Y. Kim ,  William L. Nicoll ,  Ravikumar Ramachandran ,  Reinaldo A. Vega ,  Hanfei Wang ,  Xinhui Wang

IPC: H01L29/94 ,  H01L27/108 ,  H01L27/12 ,  H01L27/08

Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.

公开(公告)号：US20170365606A1

公开(公告)日：2017-12-21

申请号：US15691182

申请日：2017-08-30

Applicant: International Business Machines Corporation

Inventor： Michael V. Aquilino ,  Veeraraghavan S. Basker ,  Kangguo Cheng ,  Gregory Costrini ,  Ali Khakifirooz ,  Byeong Y. Kim ,  William L. Nicoll ,  Ravikumar Ramachandran ,  Reinaldo A. Vega ,  Hanfei Wang ,  Xinhui Wang

IPC: H01L27/108 ,  H01L27/12

CPC classification number: H01L27/1087 ,  H01L27/0817 ,  H01L27/10826 ,  H01L27/10829 ,  H01L27/10867 ,  H01L27/10879 ,  H01L27/1203

Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.

公开(公告)号：US20160351687A1

公开(公告)日：2016-12-01

申请号：US15235935

申请日：2016-08-12

Applicant: International Business Machines Corporation

Inventor： Gregory Costrini ,  Ravikumar Ramachandran ,  Reinaldo A. Vega ,  Richard S. Wise

IPC: H01L29/66 ,  H01L21/306 ,  H01L29/51 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06 ,  H01L27/088 ,  H01L21/311

CPC classification number: H01L29/66545 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/823431 ,  H01L21/823462 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/517 ,  H01L29/6681

Abstract: Semiconductor-oxide-containing gate dielectrics can be formed on surfaces of semiconductor fins prior to formation of a disposable gate structure. A high dielectric constant (high-k) dielectric spacer can be formed to protect each semiconductor-oxide-containing gate dielectric. Formation of the high-k dielectric spacers may be performed after formation of gate cavities by removal of disposable gate structures, or prior to formation of disposable gate structures. The high-k dielectric spacers can be used as protective layers during an anisotropic etch that vertically extends the gate cavity, and can be removed after vertical extension of the gate cavities. A subset of the semiconductor-oxide-containing gate dielectrics can be removed for formation of high-k gate dielectrics for first type devices, while another subset of the semiconductor-oxide-containing gate dielectrics can be employed as gate dielectrics for second type devices. The vertical extension of the gate cavities increases channel widths in the fin field effect transistors.

公开(公告)号：US09431395B2

公开(公告)日：2016-08-30

申请号：US14320760

申请日：2014-07-01

Applicant: International Business Machines Corporation

Inventor： Gregory Costrini ,  Ravikumar Ramachandran ,  Reinaldo A. Vega ,  Richard S. Wise

IPC: H01L29/51 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/762 ,  H01L21/306 ,  H01L21/308 ,  H01L29/66 ,  H01L21/311

CPC classification number: H01L29/66545 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/823431 ,  H01L21/823462 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/517 ,  H01L29/6681

Abstract: Semiconductor-oxide-containing gate dielectrics can be formed on surfaces of semiconductor fins prior to formation of a disposable gate structure. A high dielectric constant (high-k) dielectric spacer can be formed to protect each semiconductor-oxide-containing gate dielectric. Formation of the high-k dielectric spacers may be performed after formation of gate cavities by removal of disposable gate structures, or prior to formation of disposable gate structures. The high-k dielectric spacers can be used as protective layers during an anisotropic etch that vertically extends the gate cavity, and can be removed after vertical extension of the gate cavities. A subset of the semiconductor-oxide-containing gate dielectrics can be removed for formation of high-k gate dielectrics for first type devices, while another subset of the semiconductor-oxide-containing gate dielectrics can be employed as gate dielectrics for second type devices. The vertical extension of the gate cavities increases channel widths in the fin field effect transistors.

Abstract translation: 在形成一次性栅极结构之前，可以在半导体鳍片的表面上形成含半导体氧化物的栅极电介质。 可以形成高介电常数（高k）电介质间隔物以保护每个含半导体氧化物的栅极电介质。 高k电介质间隔物的形成可以在通过移除一次性栅极结构或者在形成一次性栅极结构之前形成栅极空腔之后进行。 高k电介质间隔物可以在垂直延伸栅极腔的各向异性蚀刻期间用作保护层，并且可以在栅腔的垂直延伸之后被去除。 可以去除含半导体氧化物的栅极电介质的子集，以形成用于第一类型器件的高k栅极电介质，而含半导体氧化物的栅极电介质的另一子集可用作第二类型器件的栅极电介质。 栅极腔的垂直延伸增加了鳍状场效应晶体管中的沟道宽度。