公开(公告)号：US12009414B2

公开(公告)日：2024-06-11

申请号：US17542322

申请日：2021-12-03

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Eunjung Cha ,  Cezar Bogdan Zota

IPC分类号： H01L29/778 ,  H01L21/285 ,  H01L21/3213 ,  H01L29/40 ,  H01L29/41 ,  H01L29/423 ,  H01L29/43 ,  H01L29/47 ,  H01L29/66

CPC分类号： H01L29/778 ,  H01L29/401 ,  H01L29/413 ,  H01L29/42316 ,  H01L29/437 ,  H01L29/475 ,  H01L29/66462 ,  H01L21/28581 ,  H01L21/28587 ,  H01L21/32136

摘要： A transistor structure, includes a buffer layer and a quantum well channel layer on top of the buffer layer. There is a barrier layer on top of the channel layer. There is a drain contact on a channel stack. A source contact is on a channel stack. A gate structure is located between the source contact and drain contact, comprising: an active gate portion having a bottom surface in contact with a bottom surface of the source and the drain contacts. A superconducting portion of the gate structure is in contact with, and adjacent to, an upper part of the active gate portion.

公开(公告)号：US20230327008A1

公开(公告)日：2023-10-12

申请号：US17714260

申请日：2022-04-06

申请人： International Business Machines Corporation

发明人： Eunjung Cha ,  Bogdan Cezar Zota ,  Kirsten Emilie Moselund ,  Katarzyna Hnida-Gut

IPC分类号： H01L29/778 ,  H01L29/88 ,  H01L29/15 ,  H01L29/66

CPC分类号： H01L29/7783 ,  H01L29/882 ,  H01L29/152 ,  H01L29/66462 ,  H01L29/66151 ,  H01L23/445

摘要： One or more devices and/or methods provided herein relate to a method for fabricating a semiconductor device having a co-integrated RTD and HEMT. A semiconductor device can comprise an RTD and an HEMT that are co-integrated along a substrate. A fabrication method can comprise providing a heterostructure comprising a plurality of transistor layers of an HEMT, forming on the vertical stack a template structure comprising an opening, a cavity and a seed structure, the seed structure comprising a seed material and a seed surface, and growing a plurality of diode layers of an RTD within the cavity of the template structure from the seed surface, wherein the RTD and HEMT are co-integrated along a substrate.

公开(公告)号：US20230197842A1

公开(公告)日：2023-06-22

申请号：US17555961

申请日：2021-12-20

申请人： International Business Machines Corporation

发明人： Cezar Bogdan Zota ,  Eunjung Cha ,  Thomas Morf ,  Peter Mueller

IPC分类号： H01L29/778 ,  H01L29/66

CPC分类号： H01L29/7786 ,  H01L29/66462

摘要： One or more systems, devices, methods of use and/or methods of fabrication provided herein relate to a high-electron-mobility transistor with a gate electrode below the channel. According to one embodiment, a device comprises a source electrode and a drain electrode coupled to a top surface of a high-electron-mobility transistor (HEMT) heterostructure, and a gate electrode located in contact with an underside of the HEMT heterostructure

公开(公告)号：US20230178642A1

公开(公告)日：2023-06-08

申请号：US17542485

申请日：2021-12-05

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Cezar Bogdan Zota ,  Thomas Morf ,  Eunjung Cha ,  Peter Mueller

IPC分类号： H01L29/778 ,  H01L29/12 ,  H01L29/66

CPC分类号： H01L29/7783 ,  H01L29/122 ,  H01L29/66462

摘要： A superconductor transistor structure includes a source electrode and a drain electrode on a same plane as the source electrode. There is a channel region on top of the source and drain electrodes and configured to carry a current. A gate structure comprising a metallic material is on top of the channel region. The source and drain are located on a side that is opposite to that of the gate structure, with respect to the channel region.

公开(公告)号：US20230178641A1

公开(公告)日：2023-06-08

申请号：US17542322

申请日：2021-12-03

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Eunjung Cha ,  Cezar Bogdan Zota

IPC分类号： H01L29/778 ,  H01L29/43 ,  H01L29/47 ,  H01L29/66 ,  H01L29/40 ,  H01L29/423 ,  H01L29/41

CPC分类号： H01L29/778 ,  H01L29/437 ,  H01L29/475 ,  H01L29/66462 ,  H01L29/401 ,  H01L29/42316 ,  H01L29/413 ,  H01L21/28581

摘要： A transistor structure, includes a buffer layer and a quantum well channel layer on top of the buffer layer. There is a barrier layer on top of the channel layer. There is a drain contact on a channel stack. A source contact is on a channel stack. A gate structure is located between the source contact and drain contact, comprising: an active gate portion having a bottom surface in contact with a bottom surface of the source and the drain contacts. A superconducting portion of the gate structure is in contact with, and adjacent to, an upper part of the active gate portion.

公开(公告)号：US20240281691A1

公开(公告)日：2024-08-22

申请号：US18171447

申请日：2023-02-20

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Bogdan Cezar Zota ,  Eunjung Cha ,  Thomas Morf ,  Mridula Prathapan ,  Peter Mueller ,  Alberto Ferraris

IPC分类号： G06N10/40

CPC分类号： G06N10/40

摘要： Embodiments including a semiconductor device circuit for biasing gates of a qubit device as well as a method for operating the device are disclosed. The embodiments may include a multiplexed array of capacitor cells, where each capacitor cell includes a transistor-controlled capacitor, where each capacitor is connected between a drain of a respective transistor and ground, where each source of all transistors of all capacitor cells are connected to a common control point, and where each gate of the transistors of the capacitor cells are individually voltage controllable. The embodiment may include a charging unit connected to the common control point, and a discharging unit connected to the common control point, where the charging unit and the discharging unit are alternatively activatable.

公开(公告)号：US20230326921A1

公开(公告)日：2023-10-12

申请号：US17714267

申请日：2022-04-06

申请人： International Business Machines Corporation

发明人： Eunjung Cha ,  Bogdan Cezar Zota ,  Kirsten Emilie Moselund ,  Katarzyna Hnida-Gut

IPC分类号： H01L27/06 ,  H01L29/88 ,  H01L29/778 ,  H01L21/8252 ,  H01L29/66

CPC分类号： H01L27/0605 ,  H01L29/882 ,  H01L29/7786 ,  H01L21/8252 ,  H01L29/66219 ,  H01L29/66462 ,  G06N10/40

摘要： One or more systems, devices and/or methods provided herein relate to a device that can facilitate generation of a pulse to affect a qubit and to a method that can facilitate fabrication of a semiconductor device. The semiconductor device can comprise an RTD and an FET co-integrated in a common layer extending along a substrate. A method for fabricating the semiconductor device can comprise applying, at a substrate layer, a template structure comprising an opening, a cavity and a seed structure comprising a seed material and a seed surface, and sequentially growing along the substrate a plurality of diode layers of an RTD and a plurality of transistor layers of an FET within the cavity of the template structure from the seed surface, wherein the RTD and FET are co-integrated along the substrate.