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    Silicon chip having through via and method for making the same
    1.
    发明授权
    Silicon chip having through via and method for making the same 有权
    具有通孔的硅芯片及其制造方法

    公开(公告)号：US08263493B2

    公开(公告)日：2012-09-11

    申请号：US12647856

    申请日：2009-12-28

    申请人： Hsueh-An Yang ,  Pei-Chun Chen ,  Chien-Hua Chen

    发明人： Hsueh-An Yang ,  Pei-Chun Chen ,  Chien-Hua Chen

    IPC分类号： H01L21/4763 ,  H01L21/44

    CPC分类号： H01L21/76898

    摘要： The present invention relates to a silicon chip having a through via and a method for making the same. The silicon chip includes a silicon substrate, a passivation layer, at least one electrical device and at least one through via. The passivation layer is disposed on a first surface of the silicon substrate. The electrical device is disposed in the silicon substrate, and exposed to a second surface of the silicon substrate. The through via includes a barrier layer and a conductor, and penetrates the silicon substrate and the passivation layer. A first end of the through via is exposed to the surface of the passivation layer, and a second end of the through via connects the electrical device. When a redistribution layer is formed on the surface of the passivation layer, the redistribution layer will not contact the silicon substrate, thus avoiding a short circuit. Therefore, a lower resolution process can be used, which results in low manufacturing cost and simple manufacturing process.

    摘要翻译： 本发明涉及具有贯通孔的硅芯片及其制造方法。 硅芯片包括硅衬底，钝化层，至少一个电器件和至少一个通孔。 钝化层设置在硅衬底的第一表面上。 电气设备设置在硅衬底中，并暴露于硅衬底的第二表面。 通孔包括阻挡层和导体，并且穿透硅衬底和钝化层。 通孔的第一端暴露于钝化层的表面，通孔的第二端连接电气装置。 当在钝化层的表面上形成再分布层时，再分布层将不会接触硅衬底，从而避免短路。 因此，可以使用较低分辨率的工艺，这导致制造成本低和制造工艺简单。

    Silicon Chip Having Through Via and Method for Making the Same
    2.
    发明申请
    Silicon Chip Having Through Via and Method for Making the Same 有权
    通过硅片和其制造方法

    公开(公告)号：US20100230759A1

    公开(公告)日：2010-09-16

    申请号：US12647856

    申请日：2009-12-28

    申请人： Hsueh-An Yang ,  Pei-Chun Chen ,  Chien-Hua Chen

    发明人： Hsueh-An Yang ,  Pei-Chun Chen ,  Chien-Hua Chen

    IPC分类号： H01L23/48 ,  H01L27/092 ,  H01L21/768

    CPC分类号： H01L21/76898

    摘要： The present invention relates to a silicon chip having a through via and a method for making the same. The silicon chip includes a silicon substrate, a passivation layer, at least one electrical device and at least one through via. The passivation layer is disposed on a first surface of the silicon substrate. The electrical device is disposed in the silicon substrate, and exposed to a second surface of the silicon substrate. The through via includes a barrier layer and a conductor, and penetrates the silicon substrate and the passivation layer. A first end of the through via is exposed to the surface of the passivation layer, and a second end of the through via connects the electrical device. When a redistribution layer is formed on the surface of the passivation layer, the redistribution layer will not contact the silicon substrate, thus avoiding a short circuit. Therefore, a lower resolution process can be used, which results in low manufacturing cost and simple manufacturing process.

    摘要翻译： 本发明涉及具有贯通孔的硅芯片及其制造方法。 硅芯片包括硅衬底，钝化层，至少一个电器件和至少一个通孔。 钝化层设置在硅衬底的第一表面上。 电气设备设置在硅衬底中，并暴露于硅衬底的第二表面。 通孔包括阻挡层和导体，并且穿透硅衬底和钝化层。 通孔的第一端暴露于钝化层的表面，通孔的第二端连接电气装置。 当在钝化层的表面上形成再分布层时，再分布层将不会接触硅衬底，从而避免短路。 因此，可以使用较低分辨率的工艺，这导致制造成本低和制造工艺简单。

    Silicon Chip Having Through Via and Method for Making the Same
    3.
    发明申请
    Silicon Chip Having Through Via and Method for Making the Same 审中-公开
    通过硅片和其制造方法

    公开(公告)号：US20130032889A1

    公开(公告)日：2013-02-07

    申请号：US13569882

    申请日：2012-08-08

    申请人： Hsueh-An Yang ,  Pei-Chun Chen ,  Chien-Hua Chen

    发明人： Hsueh-An Yang ,  Pei-Chun Chen ,  Chien-Hua Chen

    IPC分类号： H01L23/522 ,  H01L27/092

    CPC分类号： H01L21/76898

    摘要： The present invention relates to a silicon chip including a silicon substrate, a passivation layer, at least one electrical device and at least one through via. The passivation layer is disposed on a first surface of the silicon substrate. The electrical device is disposed in the silicon substrate, and exposed to a second surface of the silicon substrate. The through via includes a barrier layer and a conductor, and penetrates the silicon substrate and the passivation layer. A first end of the through via is exposed to the surface of the passivation layer, and a second end of the through via connects the electrical device. When a redistribution layer is formed on the surface of the passivation layer, the redistribution layer will not contact the silicon substrate, thus avoiding a short circuit.

    摘要翻译： 本发明涉及包括硅衬底，钝化层，至少一个电气器件和至少一个通孔的硅芯片。 钝化层设置在硅衬底的第一表面上。 电气设备设置在硅衬底中，并暴露于硅衬底的第二表面。 通孔包括阻挡层和导体，并且穿透硅衬底和钝化层。 通孔的第一端暴露于钝化层的表面，通孔的第二端连接电气装置。 当在钝化层的表面上形成再分布层时，再分布层将不会接触硅衬底，从而避免短路。

    DATA GRADING TRANSMISSION METHOD
    4.
    发明申请
    DATA GRADING TRANSMISSION METHOD 审中-公开
    数据分级传输方法

    公开(公告)号：US20110314273A1

    公开(公告)日：2011-12-22

    申请号：US12904806

    申请日：2010-10-14

    申请人： Pao Chuan Chu ,  Hsiu-Hsien Li ,  Li-Chen Lai ,  Liang-Chuan Lin ,  Ming Chung ,  Shou-Yi Chen ,  Shis-Kai Chang ,  Pei-Chun Chen ,  Tsan-Hua Chuang

    发明人： Pao Chuan Chu ,  Hsiu-Hsien Li ,  Li-Chen Lai ,  Liang-Chuan Lin ,  Ming Chung ,  Shou-Yi Chen ,  Shis-Kai Chang ,  Pei-Chun Chen ,  Tsan-Hua Chuang

    IPC分类号： H04L9/00

    CPC分类号： H04L63/105 ,  H04L63/0428

    摘要： A data grading transmission method includes steps of enabling a transmitting terminal to grade data according to a preset data security rule and to mark the data with labels; designating transmission routes of the data according to levels of the graded data; and enabling the data to be transmitted from the transmitting terminal to the receiving terminal through the designated transmission routes, and cascading the data having the same label according to the labels of the data. Thereby, grading data according to privacy and designating transmission routes of data reduce network establishment cost and effectively regulate data transmission rate through the data grading transmission method.

    摘要翻译： 数据分级传输方法包括以下步骤：使发送终端根据预设的数据安全规则对数据进行分级，并用标签标记数据; 根据分级数据的级别指定数据的传输路由; 并且通过指定的传输路由使数据从发送终端发送到接收终端，并且根据数据的标签级联具有相同标签的数据。 因此，根据隐私分级数据和指定数据传输路由降低网络建立成本，并通过数据分级传输方式有效地调节数据传输速率。

    RFID testing system
    6.
    发明申请
    RFID testing system 审中-公开
    RFID测试系统

    公开(公告)号：US20060208079A1

    公开(公告)日：2006-09-21

    申请号：US11132219

    申请日：2005-05-19

    申请人： Wei Chang ,  Chun-Te Yu ,  Sheng-Pi Wang ,  Shih-Lin Chen ,  Pei-Chun Chen ,  Rita Chang

    发明人： Wei Chang ,  Chun-Te Yu ,  Sheng-Pi Wang ,  Shih-Lin Chen ,  Pei-Chun Chen ,  Rita Chang

    IPC分类号： G06K7/08

    CPC分类号： G06K7/0008

    摘要： The present invention discloses a RFID testing system, comprising an object-under-test having a RFID tag attached thereto, a RFID reader and a tester. Wherein, the tester further comprises: a base; a bar-shaped first rail, mounted on the base in a stationary manner; a bar-shaped second rail, perpendicularly and slidably mounted on the first rail for enabling the second rail to move linearly along the first rail; a bar-shaped third rail, slidably mounted on the second rail and disposed perpendicular to the first and the second rails for enabling the third rail to move linearly along the second rail; and a clamping device, slidably mounted on the third rail for enabling the clamping device to move linearly along the third rail.

    摘要翻译： 本发明公开了一种RFID测试系统，包括附着有RFID标签的被测对象物，RFID读取器和测试器。 其中，测试器还包括：基座; 一个条形的第一轨道，以固定的方式安装在基座上; 一个条形的第二轨道，其垂直和可滑动地安装在第一轨道上，以使得第二轨道能够沿着第一轨道线性移动; 一个条形的第三轨道，可滑动地安装在第二轨道上并且垂直于第一和第二轨道设置，以使得第三轨道能够沿着第二轨道线性移动; 以及夹紧装置，可滑动地安装在第三导轨上，以使夹紧装置能够沿第三导轨线性移动。

    Tag ablation mechanism and tag-and-tape combination apparatus using the same
    9.
    发明授权
    Tag ablation mechanism and tag-and-tape combination apparatus using the same 有权
    标签消融机构和使用其的标签和磁带组合装置

    公开(公告)号：US08186409B2

    公开(公告)日：2012-05-29

    申请号：US12621690

    申请日：2009-11-19

    申请人： Kuei-Kai Shao ,  Pei-Chun Chen ,  Chen-Shen Liu ,  Chin-Lu Huang

    发明人： Kuei-Kai Shao ,  Pei-Chun Chen ,  Chen-Shen Liu ,  Chin-Lu Huang

    IPC分类号： B32B37/22

    CPC分类号： B65C1/025 ,  B65C11/004 ,  B65C2009/0003 ,  Y10T156/1195 ,  Y10T156/1343 ,  Y10T156/1707 ,  Y10T156/1795 ,  Y10T156/18 ,  Y10T156/1994

    摘要： The present invention provides a tag ablation mechanism and a tag-and-tape combination apparatus using the same, wherein a driving gear is actuated to rotate by a rotating device by way of a lever to drive a driven gear to rotate so as to ablate a tag from a bottom paper extended from a tag roll on the driven gear. In the present invention, an ablated tag is capable of being combined with a tape so that the tag attached to the tape can be adhered to a packaged object. The mechanism and apparatus of the present invention are capable of adjusting a rotating arc length so as to handle various tags with different sizes and lengths and to complete tag ablation and tag-and-tape combination in each driving operation.

    摘要翻译： 本发明提供了一种标签消融机构和使用该标签消除机构的标签消毒机构和标签 - 带组合装置，其中驱动齿轮由转动装置致动以通过杆旋转以驱动从动齿轮旋转，以便消除 标签从底部纸张上，从从动齿轮上的标签卷延伸。 在本发明中，烧蚀标签能够与胶带组合，使得附着在胶带上的标签可以粘附到包装物上。 本发明的机构和装置能够调节旋转弧长度，以便处理具有不同尺寸和长度的各种标签，并且在每个驱动操作中完成标签消融和标签 - 带组合。