Multi-level type nonvolatile semiconductor memory device

    公开(公告)号:US06605839B2

    公开(公告)日:2003-08-12

    申请号:US10303726

    申请日:2002-11-26

    IPC分类号: H01L2976

    摘要: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode. The electric charge-capturing film has a multi-layer structure in which at least four insulating films and at least three dielectric films each working as an electric charge accumulation layer are alternatingly laminated one upon the other, the lowermost insulating film among the at least four insulating films is formed as a gate-insulating film, a plurality of different threshold voltages are set to the at least three dielectric films to correspond to their electric charge-capturing states, and at least four kinds of memory states are specified depending upon the plurality of threshold voltages. This constitution makes it possible to easily and reliably adjust the amount of electric charge to be captured and, hence, to store desired multi-value data while preventing the occurrence of an inconvenience such as data corruption.

    Multi-level type nonvolatile semiconductor memory device
    2.
    发明授权
    Multi-level type nonvolatile semiconductor memory device 有权
    多级型非易失性半导体存储器件

    公开(公告)号:US06469343B1

    公开(公告)日:2002-10-22

    申请号:US09679650

    申请日:2000-10-05

    IPC分类号: H01L29792

    摘要: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode. The electric charge-capturing film has a multi-layer structure in which at least four insulating films and at least three dielectric films each working as an electric charge accumulation layer are alternatingly laminated one upon the other, the lowermost insulating film among the at least four insulating films is formed as a gate-insulating film, a plurality of different threshold voltages are set to the at least three dielectric films to correspond to their electric charge-capturing states, and at least four kinds of memory states are specified depending upon the plurality of threshold voltages. This constitution makes it possible to easily and reliably adjust the amount of electric charge to be captured and, hence, to store desired multi-value data while preventing the occurrence of an inconvenience such as data corruption.

    摘要翻译: 一种具有非易失性存储单元的非易失性半导体存储器件,每个所述存储单元包括一种类型的导电的半导体衬底,形成在所述半导体衬底中的相对电导体的一对源区和漏区, 在一对源区和漏区之间的沟道区上形成的捕获膜,以及形成在电荷捕获膜上并用作控制电极的栅电极。 电荷捕获膜具有多层结构,其中至少四个绝缘膜和每个用作电荷蓄积层的至少三个电介质膜彼此交替层叠,所述至少四个绝缘膜 形成绝缘膜作为栅极绝缘膜,对至少三个电介质膜设置多个不同的阈值电压以对应于其电荷捕获状态,并且根据多个不同的阈值电压指定至少四种存储状态 的阈值电压。 这种结构使得可以容易且可靠地调整要捕获的电荷量,并因此存储期望的多值数据,同时防止诸如数据损坏的不便的发生。

    Method of making multi-level type non-volatile semiconductor memory device
    3.
    发明授权
    Method of making multi-level type non-volatile semiconductor memory device 有权
    制造多级型非易失性半导体存储器件的方法

    公开(公告)号:US06596590B1

    公开(公告)日:2003-07-22

    申请号:US09679649

    申请日:2000-10-05

    IPC分类号: H01L218247

    摘要: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode. The electric charge-capturing film has a multi-layer structure in which at least four insulating films and at least three dielectric films each working as an electric charge accumulation layer are alternatingly laminated one upon the other, the lowermost insulating film among the at least four insulating films is formed as a gate-insulating film, a plurality of different threshold voltages are set to the at least three dielectric films to correspond to their electric charge-capturing states, and at least four kinds of memory states are specified depending upon the plurality of threshold voltages. This constitution makes it possible to easily and reliably adjust the amount of electric charge to be captured and, hence, to store desired multi-value data while preventing the occurrence of an inconvenience such as data corruption.

    摘要翻译: 一种具有非易失性存储单元的非易失性半导体存储器件,每个所述存储单元包括一种类型的导电的半导体衬底,形成在所述半导体衬底中的相对电导体的一对源区和漏区, 在一对源区和漏区之间的沟道区上形成的捕获膜,以及形成在电荷捕获膜上并用作控制电极的栅电极。 电荷捕获膜具有多层结构,其中至少四个绝缘膜和每个用作电荷蓄积层的至少三个电介质膜彼此交替层叠,所述至少四个绝缘膜 形成绝缘膜作为栅极绝缘膜,对至少三个电介质膜设置多个不同的阈值电压以对应于其电荷捕获状态,并且根据多个不同的阈值电压指定至少四种存储状态 的阈值电压。 这种结构使得可以容易且可靠地调整要捕获的电荷量,并因此存储期望的多值数据,同时防止诸如数据损坏的不便的发生。

    Multi-level type nonvolatile semiconductor memory device
    4.
    发明授权
    Multi-level type nonvolatile semiconductor memory device 有权
    多级型非易失性半导体存储器件

    公开(公告)号:US06649542B2

    公开(公告)日:2003-11-18

    申请号:US10146949

    申请日:2002-05-17

    IPC分类号: H01L21469

    摘要: A method of writing data into a memory cell of a non-volatile semiconductor memory device includes setting a write voltage applied to portions of the memory cells depending upon a value of write data, and applying, to a gate electrode, a voltage by which an electric charge is allowed to tunnel through an insulating film on a lower side of a dialectric film that captures the electric charge corresponding to a data value. The amount of electric charge captured is easily and reliably adjusted in order to store desired multi-value digital data, while preventing occurrence of data corruption.

    摘要翻译: 将数据写入到非易失性半导体存储器件的存储单元中的方法包括根据写入数据的值来设置施加到存储器单元的部分的写入电压,以及向栅极施加电压, 允许电荷通过捕获对应于数据值的电荷的方位膜的下侧的绝缘膜隧穿。 捕获的电荷量容易且可靠地调整以便存储所需的多值数字数据,同时防止数据损坏的发生。

    Multi-level type nonvolatile semiconductor memory device
    5.
    发明授权
    Multi-level type nonvolatile semiconductor memory device 有权
    多级型非易失性半导体存储器件

    公开(公告)号:US06285596B1

    公开(公告)日:2001-09-04

    申请号:US09679651

    申请日:2000-10-05

    IPC分类号: G11C1604

    摘要: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode. The electric charge-capturing film has a multi-layer structure in which at least four insulating films and at least three dielectric films each working as an electric charge accumulation layer are alternatingly laminated one upon the other, the lowermost insulating film among the at least four insulating films is formed as a gate-insulating film, a plurality of different threshold voltages are set to the at least three dielectric films to correspond to their electric charge-capturing states, and at least four kinds of memory states are specified depending upon the plurality of threshold voltages. This constitution makes it possible to easily and reliably adjust the amount of electric charge to be captured and, hence, to store desired multi-value data while preventing the occurrence of an inconvenience such as data corruption.

    摘要翻译: 一种具有非易失性存储单元的非易失性半导体存储器件,每个所述存储单元包括一种类型的导电的半导体衬底,形成在所述半导体衬底中的相对电导体的一对源区和漏区, 在一对源区和漏区之间的沟道区上形成的捕获膜,以及形成在电荷捕获膜上并用作控制电极的栅电极。 电荷捕获膜具有多层结构,其中至少四个绝缘膜和每个用作电荷蓄积层的至少三个电介质膜彼此交替层叠,所述至少四个绝缘膜 形成绝缘膜作为栅极绝缘膜,对至少三个电介质膜设置多个不同的阈值电压以对应于其电荷捕获状态,并且根据多个不同的阈值电压指定至少四种存储状态 的阈值电压。 这种结构使得可以容易且可靠地调整要捕获的电荷量,并因此存储期望的多值数据,同时防止诸如数据损坏的不便的发生。

    POWER DEMAND-SUPPLY MANAGEMENT SERVER AND POWER DEMAND-SUPPLY MANAGEMENT SYSTEM
    6.
    发明申请
    POWER DEMAND-SUPPLY MANAGEMENT SERVER AND POWER DEMAND-SUPPLY MANAGEMENT SYSTEM 有权
    电力需求管理服务器和电力需求管理系统

    公开(公告)号:US20110282505A1

    公开(公告)日:2011-11-17

    申请号:US13061202

    申请日:2010-01-08

    IPC分类号: G06F1/32

    摘要: A power demand/supply management server (10) obtains information defining restraint contents to a comfort and an electricity bill from a consumer power operating device (2). An individual-consumer control optimizing unit of the power demand/supply management server (10) calculates control contents to an electrical equipment having a minimum cost evaluation value based on a simulation result of cost evaluation values which are barometers for evaluating a comfort and an electricity bill excessiveness, and transmits the calculated control contents to the consumer power operating device (2). Also, a whole-consumer optimizing unit of the power demand/supply management server (10) calculates the most appropriate electricity unit meter-charge that ensures a necessary demand suppression plan level throughout the whole power system based on an electricity daily load curve for each consumer.

    摘要翻译: 电力需求/供应管理服务器(10)从消费电力操作装置(2)获得定义约束内容到舒适性和电费单的信息。 电力需求/供应管理服务器(10)的个人消费者控制优化单元基于作为用于评估舒适度和电力的气压计的成本评估值的模拟结果来计算具有最低成本评估值的电气设备的控制内容 票据过多,并将计算出的控制内容发送给消费者电力操作装置(2)。 此外,电力需求/供应管理服务器(10)的整体消费者优化单元计算最适合的电力单位计费,其基于每个电力日负荷曲线确保整个电力系统中的必要的需求抑制计划水平 消费者。

    Coordinating controller for electric power equipment
    10.
    发明授权
    Coordinating controller for electric power equipment 有权
    电力设备协调控制器

    公开(公告)号:US07197378B2

    公开(公告)日:2007-03-27

    申请号:US10645483

    申请日:2003-08-22

    IPC分类号: G05D17/00 G01R21/133

    摘要: A coordination controller prevents the deterioration of electric power quality in an electric power system, such as in terms of voltage values, that can be caused when distributed power resources connected in parallel to the electric power system are operated without restrictions. A distributed power resource 103 includes means 112 for communicating with the outside of an electric power facility, means 116 for monitoring the current time, means 115 for synchronizing with the outside time, means 112 for receiving a control schedule for an electric power-consuming apparatus or electric power generating apparatus, and a coordination controller 101 for implementing the control schedule according to the time obtained by the time monitoring means 116.

    摘要翻译: 协调控制器防止电力系统中的电力质量的劣化,例如在电力系统并联连接的分布式电力资源无限制地运行时可能导致的电压值的变化。 分布式电力资源103包括用于与电力设施的外部通信的装置112,用于监视当前时间的装置116,用于与外部时间同步的装置115,用于接收电力消耗装置的控制计划的装置112 或发电装置,以及用于根据由时间监视装置116获得的时间来实现控制进度的协调控制器101。