摘要:
A testing circuit for a semiconductor device having a test mode in which the information about built-in memory cannot be read after conducting a test on a semiconductor device, and cutting a pad formed in a scribe area is provided. The scribe PAD and the scribe ROM are formed in the cutting area of a wafer. Upon power-up of a chip a, the power-on reset circuit transmits a reset signal to the mode register. After setting the initial resister value to “00”, a mode switch signal is input from the mode switch terminal, the scribe ROM is activated, and the test mode is set. In this process, a Manchester coded signal is provided from the scribe PAD, decoded by a clock of dividing frequency provided from the clock dividing circuit, the value of the register in the test mode in the mode register is set, and external reset is asserted or negated.
摘要:
A semiconductor memory device includes a memory bank which is divided into a plurality of memory blocks including a first memory block and a second memory block. A first sense amplifier control unit activates sense amplifiers connected with the first memory block, in response to a first activation signal. A second sense amplifier control unit activates sense amplifiers connected with the second memory block, in response to a second activation signal. A signal control unit outputs the first activation signal and the second activation signal to the first sense amplifier control unit and the second sense amplifier control unit, separately from each other, the signal control unit outputting the second activation signal to the second sense amplifier control unit by delaying the first activation signal by a predetermined time after the outputting of the first activation signal.
摘要:
A testing circuit for a semiconductor device having a test mode in which the information about built-in memory cannot be read after conducting a test on a semiconductor device, and cutting a pad formed in a scribe area is provided. The scribe PAD and the scribe ROM are formed in the cutting area of a wafer. Upon power-up of a chip a, the power-on reset circuit transmits a reset signal to the mode register. After setting the initial resister value to “00”, a mode switch signal is input from the mode switch terminal, the scribe ROM is activated, and the test mode is set. In this process, a Manchester coded signal is provided from the scribe PAD, decoded by a clock of dividing frequency provided from the clock dividing circuit, the value of the register in the test mode in the mode register is set, and external reset is asserted or negated.
摘要:
An optical material including a colored optically anisotropic layer, the colored optically anisotropic layer having at least one maximum absorption wavelength with a nonpolarized light transmittance of 30 percent or lower in a wavelength range of 430 to 700 nm, wherein the absorbance Amax at the polarization of maximum absorbance and the absorbance Amin at the polarization of minimum absorbance of the colored optically anisotropic layer satisfy the following relation at the maximum absorption wavelength: 1.0≦Amax/Amin≦1.4, and the in-plane retardation of the colored optically anisotropic layer is greater than or equal to 10 nm and less than 1,000 nm, which can be employed as a material for forming a color filter having optical compensation capability.
摘要:
A substrate for liquid crystal display device which can provide a vertically-aligned (VA)-mode liquid crystal display device having a good viewing angle dependence of contrast and at the same time can keep the production process as simple as possible is provided: a substrate for liquid crystal display device having a smoothing layer, the smoothing layer being a negative uniaxial optically anisotropic layer having an optical axis in the direction normal to the substrate surface, particularly the substrate for liquid crystal display device having a color filter layer and/or an electrode, and the negative uniaxial optically anisotropic layer having an optical axis in the direction normal to the substrate surface being directly provided on the color filter layer or the electrode.
摘要:
A data processing apparatus and card-sized data processing device that consume less power and operate more reliably. An antenna captures a radio wave sent from an external reader/writer device, and a receiver converts it into an electrical signal. From this electrical signal, a first power supply circuit produces a first supply voltage for use in analog circuits. A second power supply circuit produces a second supply voltage that is different from the first supply voltage, for use in memory circuits. A third power supply circuit produces a third supply voltage that is different from the other voltages, for use in digital circuits. The memory and digital circuits thus operate with different supply voltages optimized for their individual requirements. Total power consumption of the device is reduced by lowering the voltage for the digital circuits, including MPU, while giving a higher voltage to the memory circuits.
摘要:
An exposing apparatus for exposing the periphery portion of a substrate on which resist is uniformly applied while rotating the substrate by a rotating device around a substantially central portion of the substrate, comprising: an irradiating device capable of irradiating a light beam, which is not sensed by the resist, toward the periphery portion of the resist; a light receiving device disposed to confront the irradiating device, receiving the light beam and outputting a light receipt signal in accordance with the quantity of received light; a detection device for detecting the rotational angle of the resist and outputting an angular signal; a moving device for relatively moving the light beam irradiated and the substrate in a radial direction; and a control device, wherein the substrate is disposed between the irradiating device and the light receiving device so as to shield a portion of the light beam and a control device controls the moving device in accordance with the light receipt signal and the angular signal so as to relatively move the light beam and the substrate in such a manner that the radial directional width of a region which is irradiated with the light beam is substantially constant in the periphery portion of the resist.
摘要:
A start-up failsafe system for an engine control system monitors a command signal and the corresponding feedback signal for a fuel injection rate control servo device when the starter motor switch is closed. If the feedback signal and the command signal differ by more than a predetermined amount, the failsafe system acts to prevent operation of the starter motor.
摘要:
A toner for developing a digital-image and being fused onto a recording medium by heat and pressure, said toner comprising: a coloring agent; a first polyester resin having a softening temperature of 105.degree. C..about.112.degree. C.; a second polyester resin having a softening temperature of 150.degree. C..about.155.degree. C. wherein a mix ratio of the first resin to the second resin is between from 75/25 to 40/60 and an oxided polyolefine. Said toner has a characteristics of a high reproductivity of a digital dot image, a high fixing-strength, a wide range of an offset boundary temperature and an anti-filming property.
摘要:
A failsafe system for an engine-control servomotor compares a servomotor command signal to a feedback signal from the servomotor. When the magnitude of the difference between the two signals is greater than a predetermined value for a predetermined time, the failsafe system shuts down the servomotor or performs some other engine shut-down procedure. The failsafe system includes a comparator for comparing the two signals, the output of which leads to two other op-amp-type comparators connected in parallel, which work on negative or positive outputs of the first-mentioned comparator, respectively. Each of the later comparators receives a reference voltage input against which to compare the output of the first-mentioned comparator. Their outputs lead parallelly to time-delay circuits which check for a positive output for a predetermined length of time by a well-known capacitor-integration technique.