公开(公告)号：US20060052070A1

公开(公告)日：2006-03-09

申请号：US11189941

申请日：2005-07-26

申请人： Hang Jin ,  John Grabner ,  Jun Huang ,  Daniel Ho

发明人： Hang Jin ,  John Grabner ,  Jun Huang ,  Daniel Ho

IPC分类号： H04B1/04

CPC分类号： H03G3/3052 ,  H03G2201/103 ,  H03G2201/204 ,  H03G2201/305 ,  H03G2201/706

摘要： The present invention discloses a proactive gain control system for a communications receiver. The proactive gain control system includes a variable gain module for outputting an output signal in response to an input signal. A detector detects the output signal and outputs a detection signal representing a signal strength of the output signal. A traffic monitor monitors the output signal and outputs a traffic profile signal indicating that a traffic profile for the input signal will change. A gain computing module outputs a gain adjustment value in response to the detection signal and the traffic profile signal. A gain control module outputs a gain control signal to the variable gain module, which determines a gain between the input and output signals, in response to the gain adjustment value.

公开(公告)号：US07656199B2

公开(公告)日：2010-02-02

申请号：US12359737

申请日：2009-01-26

申请人： Daniel Ho

发明人： Daniel Ho

IPC分类号： H03K5/22

CPC分类号： H03K5/2481

摘要： A fast, accurate, low offset comparator may be configured with multiple gain stages. A low gain, low input impedance, and fully differential common-gate amplifier may be configured as a first stage in the multi-stage comparator, providing a wide bandwidth for small power consumption. The inputs of the comparator may comprise a pair of differential inputs at respective source terminals of gate-coupled metal oxide semiconductor (MOS) devices configured in the input stage of the common-gate amplifier. A pair of differential outputs of the first stage may be coupled to a pair of differential inputs of a second stage, which may be a differential input current-mirror amplifier that may perform differential to single-ended conversion. The single-ended output of the second stage may serve as the input into a latch, which may be a bistable set-reset (SR) latch configured to increase the gain and response time while protecting against multiple switching, with the single-ended output of the latch configured as the output of the comparator.

摘要翻译： 快速，准确，低偏移的比较器可以配置有多个增益级。 低增益，低输入阻抗和全差分共栅放大器可以被配置为多级比较器中的第一级，为小功耗提供宽带宽。 比较器的输入可以包括在共栅极放大器的输入级中配置的栅极耦合金属氧化物半导体（MOS）器件的相应源极端处的一对差分输入。 第一级的一对差分输出可以耦合到第二级的一对差分输入，其可以是可执行差分到单端转换的差分输入电流镜放大器。 第二级的单端输出可以用作锁存器的输入，锁存器可以是双稳态置位复位（SR）锁存器，其被配置为增加增益和响应时间，同时防止多次开关，单端输出 锁存器配置为比较器的输出。

公开(公告)号：US20090128193A1

公开(公告)日：2009-05-21

申请号：US12359737

申请日：2009-01-26

申请人： Daniel Ho

发明人： Daniel Ho

IPC分类号： H03K5/22

CPC分类号： H03K5/2481

摘要： A fast, accurate, low offset comparator may be configured with multiple gain stages. A low gain, low input impedance, and fully differential common-gate amplifier may be configured as a first stage in the multi-stage comparator, providing a wide bandwidth for small power consumption. The inputs of the comparator may comprise a pair of differential inputs at respective source terminals of gate-coupled metal oxide semiconductor (MOS) devices configured in the input stage of the common-gate amplifier. A pair of differential outputs of the first stage may be coupled to a pair of differential inputs of a second stage, which may be a differential input current-mirror amplifier that may perform differential to single-ended conversion. The single-ended output of the second stage may serve as the input into a latch, which may be a bistable set-reset (SR) latch configured to increase the gain and response time while protecting against multiple switching, with the single-ended output of the latch configured as the output of the comparator.

摘要翻译： 快速，准确，低偏移的比较器可以配置有多个增益级。 低增益，低输入阻抗和全差分共栅放大器可以被配置为多级比较器中的第一级，为小功耗提供宽带宽。 比较器的输入可以包括在共栅极放大器的输入级中配置的栅极耦合金属氧化物半导体（MOS）器件的相应源极端处的一对差分输入。 第一级的一对差分输出可以耦合到第二级的一对差分输入，其可以是可执行差分到单端转换的差分输入电流镜放大器。 第二级的单端输出可以用作锁存器的输入，锁存器可以是双稳态置位复位（SR）锁存器，其被配置为增加增益和响应时间，同时防止多次开关，单端输出 锁存器配置为比较器的输出。

公开(公告)号：US20070085520A1

公开(公告)日：2007-04-19

申请号：US11380508

申请日：2006-04-27

申请人： Daniel Ho

发明人： Daniel Ho

IPC分类号： G05F1/00

CPC分类号： H02M3/1588 ,  H02M2001/0009 ,  Y02B70/1466

摘要： A step-down switching voltage regulator may operate in PFM mode based on peak current sense without requiring an external diode. The regulator may comprise a PMOS transistor and an NMOS transistor whose drains are coupled to a common output node and whose sources are coupled to high and low supply voltages, respectively, configured to develop a current in an inductor and generate an output voltage. A control circuit, coupled to the respective gates of the PMOS transistor and the NMOS transistor, may sense the current in the inductor (IL), sense an attenuated version of the output voltage (VFB), and sense the polarity of the voltage (VX) developed at the common output node. The control circuit may turn on the PMOS transistor when the VFB falls below a reference voltage and VX remains positive with respect to the low supply voltage, and may turn off the PMOS transistor when IL reaches a specified value or when VFB exceeds the reference voltage. The control circuit may also turn on the NMOS transistor after the PMOS transistor is turned off and VX becomes negative with respect to the low supply voltage, and may turn off the NMOS transistor when VX becomes positive with respect to the low supply voltage.

摘要翻译： 降压开关电压调节器可以基于峰值电流检测在PFM模式下工作，而不需要外部二极管。 调节器可以包括PMOS晶体管和NMOS晶体管，其漏极耦合到公共输出节点，并且其源极分别耦合到高电源电压和低电源电压，配置为在电感器中产生电流并产生输出电压。 耦合到PMOS晶体管和NMOS晶体管的各个栅极的控制电路可以感测电感器中的电流（I L L L），感测输出电压（VFB）的衰减版本，以及 感测在公共输出节点处开发的电压（VX）的极性。 当VFB低于参考电压并且VX相对于低电源电压保持为正时，控制电路可以导通PMOS晶体管，并且当I L L达到指定值时可以关断PMOS晶体管 或当VFB超过参考电压时。 在PMOS晶体管截止并且VX相对于低电源电压变为负值之后，控制电路也可以导通NMOS晶体管，并且当VX相对于低电源电压变为正时，可以关断NMOS晶体管。

公开(公告)号：US07092534B2

公开(公告)日：2006-08-15

申请号：US10862917

申请日：2004-06-07

申请人： Yuhe Wang ,  Peter P. White ,  Daniel Ho ,  Frank Nguyen ,  Chin-Chi Chang ,  Jeetin Rathore

发明人： Yuhe Wang ,  Peter P. White ,  Daniel Ho ,  Frank Nguyen ,  Chin-Chi Chang ,  Jeetin Rathore

IPC分类号： H04B15/00

CPC分类号： H03F1/305 ,  H03F3/187 ,  H03G3/002 ,  H03M1/0881 ,  H03M1/66

摘要： A method and system are disclosed for controlling pop noises in a sound broadcasting system. After controllably connecting an output of a drive amplifier to a first predetermined low voltage level through a first switch, a first portion of an operation control data set is input to a digital-to-analog converter (DAC) circuit for driving an output thereof to a second predetermined low voltage level, and a second portion of the operation control data set is also input to the DAC circuit and further to the drive amplifier to bring the output of the drive amplifier to a common mode voltage level over a predetermined rise-up time period for controlling the pop noises.

摘要翻译： 公开了一种用于控制声音广播系统中的弹奏噪声的方法和系统。 在通过第一开关可控地将驱动放大器的输出连接到第一预定低电压电平之后，操作控制数据组的第一部分被输入到数模转换器（DAC）电路，用于驱动其输出到 第二预定低电压电平和第二部分操作控制数据组也被输入到DAC电路，并进一步输入到驱动放大器，以使驱动放大器的输出达到预定上升沿的共模电压电平 控制流行音色的时间段。

公开(公告)号：US20120139645A1

公开(公告)日：2012-06-07

申请号：US13310593

申请日：2011-12-02

申请人： Daniel Ho ,  Malcolm Smith

发明人： Daniel Ho ,  Malcolm Smith

IPC分类号： H03F3/16

CPC分类号： H03F3/193 ,  H03F1/342 ,  H03F1/523 ,  H03F2200/456 ,  H03F2200/462

摘要： The apparatus and method thereof accurately sense and convert a radio frequency (RF) current signal to direct current (DC) independent of process variation and temperature, and without requiring high speed, high voltage amplifiers for its operation. The apparatus comprises an AC coupled circuit that couples the RF signal from the main device to a sense device with an N:M ratio, a low pass filter system that extracts the DC content of the RF current signal, and a negative feedback loop that forces the DC content of the main device and the sensed device to be equal. Exemplary embodiments include a current sensor that provides feedback to protect an RF power amplifier from over-current condition, and a RF power detection and control in a RF power amplifier (PA) that multiplies the sensed output current by the sensed output voltage to be used as a feedback to control the PA's bias.

摘要翻译： 其装置和方法能够将射频（RF）电流信号精确地检测并转换成独立于过程变化和温度的直流电流，并且不需要用于其操作的高速高压放大器。 该装置包括AC耦合电路，其将来自主装置的RF信号耦合到具有N:M比率的感测装置，提供RF电流信号的DC内容的低通滤波器系统以及迫使 主设备和感测设备的DC内容相等。 示例性实施例包括提供反馈以保护RF功率放大器免受过电流状况的电流传感器以及RF感测功率放大器（PA）中的RF功率检测和控制，该功率放大器（PA）将感测的输出电流乘以感测的待使用的输出电压 作为反馈，以控制PA的偏见。

公开(公告)号：US20120139635A1

公开(公告)日：2012-06-07

申请号：US13310544

申请日：2011-12-02

申请人： Daniel Ho ,  Stephen Franck ,  Ying Shi ,  Baker Scott

发明人： Daniel Ho ,  Stephen Franck ,  Ying Shi ,  Baker Scott

IPC分类号： H03G3/00

CPC分类号： H03G3/3042 ,  H03F1/0233 ,  H03F1/0261 ,  H03F1/223 ,  H03F3/245 ,  H03F2200/18 ,  H03F2200/405 ,  H03F2200/465 ,  H03G1/007

摘要： A gate power control technique for a power amplifier (PA) provides practical improved efficiency at backed-off power levels. It can be applied to the main gate of the output stage of the PA, the cascode gate, or any combination thereof. Both voltage mode and current mode signal processing may be used. The gate power control can be implemented in both open-loop and closed-loop using AC and DC coupled drivers and output stages. It may further use one or more control ports in the radio frequency (RF) signal path.

摘要翻译： 用于功率放大器（PA）的栅极功率控制技术在退避功率电平方面提供实际的提高的效率。 它可以应用于PA的输出级的主栅极，共源共栅栅极或其任何组合。 可以使用电压模式和电流模式信号处理两者。 门功率控制可以使用交流和直流耦合驱动器和输出级在开环和闭环中实现。 它可以进一步使用射频（RF）信号路径中的一个或多个控制端口。

公开(公告)号：US07514966B2

公开(公告)日：2009-04-07

申请号：US11421540

申请日：2006-06-01

申请人： Daniel Ho

发明人： Daniel Ho

IPC分类号： H03K5/22

CPC分类号： H03K5/2481

摘要： A fast, accurate, low offset comparator may be configured with multiple gain stages. A low gain, low input impedance, and fully differential common-gate amplifier may be configured as a first stage in the multi-stage comparator, providing a wide bandwidth for small power consumption. The inputs of the comparator may comprise a pair of differential inputs at respective source terminals of gate-coupled metal oxide semiconductor (MOS) devices configured in the input stage of the common-gate amplifier. A pair of differential outputs of the first stage may be coupled to a pair of differential inputs of a second stage, which may be a differential input current-mirror amplifier that may perform differential to single-ended conversion. The single-ended output of the second stage may serve as the input into a latch, which may be a bistable set-reset (SR) latch configured to increase the gain and response time while protecting against multiple switching, with the single-ended output of the latch configured as the output of the comparator.

摘要翻译： 快速，准确，低偏移的比较器可以配置有多个增益级。 低增益，低输入阻抗和全差分共栅放大器可以被配置为多级比较器中的第一级，为小功耗提供宽带宽。 比较器的输入可以包括在共栅极放大器的输入级中配置的栅极耦合金属氧化物半导体（MOS）器件的相应源极端处的一对差分输入。 第一级的一对差分输出可以耦合到第二级的一对差分输入，其可以是可执行差分到单端转换的差分输入电流镜放大器。 第二级的单端输出可以用作锁存器的输入，锁存器可以是双稳态置位复位（SR）锁存器，其被配置为增加增益和响应时间，同时防止多次开关，单端输出 锁存器配置为比较器的输出。

公开(公告)号：USD506080S1

公开(公告)日：2005-06-14

申请号：US29188842

申请日：2003-08-25

申请人： Daniel Ho

设计人： Daniel Ho

公开(公告)号：US07327127B2

公开(公告)日：2008-02-05

申请号：US11380508

申请日：2006-04-27

申请人： Daniel Ho

发明人： Daniel Ho

IPC分类号： G05F1/565

CPC分类号： H02M3/1588 ,  H02M2001/0009 ,  Y02B70/1466

摘要： A step-down switching voltage regulator may operate in PFM mode based on peak current sense without requiring an external diode. The regulator may comprise a PMOS transistor and an NMOS transistor whose drains are coupled to a common output node and whose sources are coupled to high and low supply voltages, respectively, configured to develop a current in an inductor and generate an output voltage. A control circuit, coupled to the respective gates of the PMOS transistor and the NMOS transistor, may sense the current in the inductor (IL), sense an attenuated version of the output voltage (VFB), and sense the polarity of the voltage (VX) developed at the common output node. The control circuit may turn on the PMOS transistor when the VFB falls below a reference voltage and VX remains positive with respect to the low supply voltage, and may turn off the PMOS transistor when IL reaches a specified value or when VFB exceeds the reference voltage. The control circuit may also turn on the NMOS transistor after the PMOS transistor is turned off and VX becomes negative with respect to the low supply voltage, and may turn off the NMOS transistor when VX becomes positive with respect to the low supply voltage.

摘要翻译： 降压开关电压调节器可以基于峰值电流检测在PFM模式下工作，而不需要外部二极管。 调节器可以包括PMOS晶体管和NMOS晶体管，其漏极耦合到公共输出节点，并且其源极分别耦合到高电源电压和低电源电压，配置为在电感器中产生电流并产生输出电压。 耦合到PMOS晶体管和NMOS晶体管的各个栅极的控制电路可以感测电感器中的电流（I L L L），感测输出电压（VFB）的衰减版本，以及 感测在公共输出节点处开发的电压（VX）的极性。 当VFB低于参考电压并且VX相对于低电源电压保持为正时，控制电路可以导通PMOS晶体管，并且当I L L达到指定值时可以关断PMOS晶体管 或当VFB超过参考电压时。 在PMOS晶体管截止并且VX相对于低电源电压变为负值之后，控制电路也可以导通NMOS晶体管，并且当VX相对于低电源电压变为正时，可以关断NMOS晶体管。