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公开(公告)号：US12160314B2
公开(公告)日：2024-12-03
申请号：US17525189
申请日：2021-11-12
Applicant: Huawei Technologies Co., Ltd.
Inventor： Xiang He , Xinyuan Wang , Jun Lin , Zhongfeng Wang
Abstract: A method includes: a first chip receives a first data stream from a second chip, where the first data stream is obtained through encoding by using a first forward error correction (FEC) code type; and the first chip re-encodes the first data stream at least once, to obtain a second data stream, where the second data stream is a concatenated FEC code stream obtained through encoding by using at least the first FEC code type and a second FEC code type.
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Patent Agency Ranking
2.发明申请公开(公告)号：US20220077875A1
公开(公告)日：2022-03-10
申请号：US17525189
申请日：2021-11-12
Applicant: Huawei Technologies Co., Ltd.
Inventor： Xiang He , Xinyuan Wang , Jun Lin , Zhongfeng Wang
Abstract: A method includes: a first chip receives a first data stream from a second chip, where the first data stream is obtained through encoding by using a first forward error correction (FEC) code type; and the first chip re-encodes the first data stream at least once, to obtain a second data stream, where the second data stream is a concatenated FEC code stream obtained through encoding by using at least the first FEC code type and a second FEC code type. This application provides a concatenated coding scheme, so that a gain is higher, an FEC code type conversion process is simplified, a delay and device power consumption that are required during FEC code type conversion are reduced, and a data transmission distance and a data transmission rate are increased.
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公开(公告)号：US11121726B2
公开(公告)日：2021-09-14
申请号：US16993266
申请日：2020-08-14
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Xinyuan Wang , Wenbin Yang , Zhongfeng Wang , Jun Lin
Abstract: This application provides an encoding method, comprising: encoding first data to generate a first encoded sequence; encoding second data to generate a second encoded sequence, where a quantity of bits comprised in the first data is greater than a quantity of bits comprised in the second data, and a quantity of bits comprised in the first encoded sequence is equal to a quantity of bits comprised in the second encoded sequence; generating a symbol sequence by performing a PAM-4 modulation on an input signal, the first encoded sequence corresponds to a high bit of the input signal, and the second encoded sequence corresponds to a low bit of the input signal; and sending the symbol sequence. The method helps reduce a quantity of redundant bits, helps improve a code rate, and can reduce redundant information carried in a modulated symbol sequence.
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公开(公告)号：US20200373942A1
公开(公告)日：2020-11-26
申请号：US16993266
申请日：2020-08-14
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Xinyuan Wang , Wenbin Yang , Zhongfeng Wang , Jun Lin
Abstract: This application provides an encoding method, comprising: encoding first data to generate a first encoded sequence; encoding second data to generate a second encoded sequence, where a quantity of bits comprised in the first data is greater than a quantity of bits comprised in the second data, and a quantity of bits comprised in the first encoded sequence is equal to a quantity of bits comprised in the second encoded sequence; generating a symbol sequence by performing a PAM-4 modulation on an input signal, the first encoded sequence corresponds to a high bit of the input signal, and the second encoded sequence corresponds to a low bit of the input signal; and sending the symbol sequence. The method helps reduce a quantity of redundant bits, helps improve a code rate, and can reduce redundant information carried in a modulated symbol sequence.
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公开(公告)号：US20250038075A1
公开(公告)日：2025-01-30
申请号：US18911277
申请日：2024-10-10
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Weichuan Huang , Dongqi Chen , Yusi Xie , Jun Lin
IPC: H01L23/48 , H01L21/3213 , H01L23/495 , H01L23/498
Abstract: A integrated circuit (IC) chip includes a dielectric layer and a first conductive pillar disposed in the dielectric layer. The first conductive pillar runs through the dielectric layer in a thickness direction of the dielectric layer. The chip further includes a first conductive pattern and a second conductive pattern that are located on two opposite sides of the first conductive pillar and are coupled to the first conductive pillar. The first conductive pillar includes a metal pillar and a metal compound layer. The metal compound layer is located between the metal pillar and the dielectric layer and covers a part of a side surface of the metal pillar. The first conductive pillar is directly in contact with the dielectric layer, and no barrier layer is disposed between the first conductive pillar and the dielectric layer.
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公开(公告)号：US12206433B2
公开(公告)日：2025-01-21
申请号：US18309014
申请日：2023-04-28
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Zengchao Yan , Huixiao Ma , Zhongfeng Wang , Jun Lin
Abstract: This application discloses an Ethernet coding method and apparatus, to adapt to a scenario in which a higher transmission bit error rate is caused by a high bandwidth. The method includes: a transmit end encodes first to-be-encoded information by using a first forward error correction (FEC) codeword, to obtain first encoded data, where the first forward error correction FEC codeword is a Reed-Solomon forward error correction (RS-FEC) codeword; and the transmit end encodes the first encoded data by using a second FEC codeword, to obtain second encoded data, where a code length N and an information bit length K of the second FEC codeword satisfy the following formula: M1*N/K≤M2, where M1 is a throughput of the first encoded data, and M2 is a throughput of the second encoded data.
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