公开(公告)号：US11520581B2

公开(公告)日：2022-12-06

申请号：US17327957

申请日：2021-05-24

申请人： Google LLC

发明人： William Lacy ,  Gregory Michael Thorson ,  Christopher Aaron Clark ,  Norman Paul Jouppi ,  Thomas Norrie ,  Andrew Everett Phelps

IPC分类号： G06F9/30 ,  G06F15/80 ,  G06F9/38 ,  G06F7/58 ,  G06F13/36 ,  G06F13/40 ,  G06F13/42 ,  G06F17/16 ,  G06N3/063 ,  G06N20/00

摘要： A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.

公开(公告)号：US20210357212A1

公开(公告)日：2021-11-18

申请号：US17327957

申请日：2021-05-24

申请人： Google LLC

发明人： William Lacy ,  Gregory Michael Thorson ,  Christopher Aaron Clark ,  Norman Paul Jouppi ,  Thomas Norrie ,  Andrew Everett Phelps

IPC分类号： G06F9/30 ,  G06F15/80 ,  G06F9/38 ,  G06F7/58 ,  G06F13/36 ,  G06F13/40 ,  G06F13/42 ,  G06F17/16

摘要： A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.

公开(公告)号：US20230297372A1

公开(公告)日：2023-09-21

申请号：US18074990

申请日：2022-12-05

申请人： Google LLC

发明人： William Lacy ,  Gregory Michael Thorson ,  Christopher Aaron Clark ,  Norman Paul Jouppi ,  Thomas Norrie ,  Andrew Everett Phelps

IPC分类号： G06F9/30 ,  G06F15/80 ,  G06F9/38 ,  G06F7/58 ,  G06F13/36 ,  G06F13/40 ,  G06F13/42 ,  G06F17/16

CPC分类号： G06F9/3001 ,  G06F7/588 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30043 ,  G06F9/30098 ,  G06F9/3891 ,  G06F13/36 ,  G06F13/4068 ,  G06F13/4282 ,  G06F15/8053 ,  G06F15/8092 ,  G06F17/16 ,  G06F15/8046 ,  G06N3/063

摘要： A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.

公开(公告)号：US11016764B2

公开(公告)日：2021-05-25

申请号：US16843015

申请日：2020-04-08

申请人： Google LLC

发明人： William Lacy ,  Gregory Michael Thorson ,  Christopher Aaron Clark ,  Norman Paul Jouppi ,  Thomas Norrie ,  Andrew Everett Phelps

IPC分类号： G06F9/302 ,  G06F9/312 ,  G06F15/80 ,  G06F13/40 ,  G06F7/57 ,  G06N3/063 ,  G06N20/00 ,  G06F17/16 ,  G06F9/30 ,  G06F9/38 ,  G06F7/58 ,  G06F13/36 ,  G06F13/42

摘要： A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.

公开(公告)号：US20190243645A1

公开(公告)日：2019-08-08

申请号：US16291176

申请日：2019-03-04

申请人： Google LLC

发明人： William Lacy ,  Gregory Michael Thorson ,  Christopher Aaron Clark ,  Norman Paul Jouppi ,  Thomas Norrie ,  Andrew Everett Phelps

IPC分类号： G06F9/30 ,  G06F17/16 ,  G06F15/80 ,  G06F7/58 ,  G06F13/36 ,  G06F13/40 ,  G06F13/42

CPC分类号： G06F9/3001 ,  G06F7/588 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30043 ,  G06F9/30098 ,  G06F9/3891 ,  G06F13/36 ,  G06F13/4068 ,  G06F13/4282 ,  G06F15/8046 ,  G06F15/8053 ,  G06F15/8092 ,  G06F17/16 ,  G06N3/063

摘要： A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.

公开(公告)号：US20200233663A1

公开(公告)日：2020-07-23

申请号：US16843015

申请日：2020-04-08

申请人： Google LLC

发明人： William Lacy ,  Gregory Michael Thorson ,  Christopher Aaron Clark ,  Norman Paul Jouppi ,  Thomas Norrie ,  Andrew Everett Phelps

IPC分类号： G06F9/30 ,  G06F15/80 ,  G06F9/38 ,  G06F7/58 ,  G06F13/36 ,  G06F13/40 ,  G06F13/42 ,  G06F17/16

摘要： A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.

公开(公告)号：US10915318B2

公开(公告)日：2021-02-09

申请号：US16291176

申请日：2019-03-04

申请人： Google LLC

发明人： William Lacy ,  Gregory Michael Thorson ,  Christopher Aaron Clark ,  Norman Paul Jouppi ,  Thomas Norrie ,  Andrew Everett Phelps

IPC分类号： G06F9/302 ,  G06F9/312 ,  G06F15/76 ,  G06F13/40 ,  G06F13/42 ,  G06F17/16 ,  G06N3/063 ,  G06F9/30 ,  G06F15/80 ,  G06F9/38 ,  G06F7/58 ,  G06F13/36

摘要： A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.

公开(公告)号：US10261786B2

公开(公告)日：2019-04-16

申请号：US15454214

申请日：2017-03-09

申请人： Google LLC

发明人： William Lacy ,  Gregory Michael Thorson ,  Christopher Aaron Clark ,  Norman Paul Jouppi ,  Thomas Norrie ,  Andrew Everett Phelps

IPC分类号： G06F9/302 ,  G06F15/80 ,  G06F17/16 ,  G06F7/58 ,  G06N3/063 ,  G06F9/30 ,  G06F13/36 ,  G06F13/40 ,  G06F13/42

摘要： A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.