公开(公告)号：US20180053707A1

公开(公告)日：2018-02-22

申请号：US15658438

申请日：2017-07-25

申请人： GLOBALFOUNDRIES INC.

发明人： Siyuranga O. Koswatta ,  Sungjae Lee ,  Lan Luo ,  Scott K. Springer ,  Richard A. Wachnik

IPC分类号： H01L23/38 ,  H01L27/12 ,  H01L35/18 ,  H01L35/16 ,  H01L35/34 ,  H01L27/16 ,  H01L35/04 ,  H01L35/22 ,  H01L35/20 ,  H01L35/28

CPC分类号： H01L23/38 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/1203 ,  H01L27/16 ,  H01L35/04 ,  H01L35/16 ,  H01L35/18 ,  H01L35/20 ,  H01L35/22 ,  H01L35/28 ,  H01L35/34

摘要： A semiconductor structure comprises one or more semiconductor devices, each of the semiconductor devices having two or more electrical connections; one or more first conductors connected to a first electrical connection on the semiconductor device, the first conductor comprising a first material having a positive Seebeck coefficient; and one or more second conductors connected to a second electrical connection on the semiconductor device, the second conductor comprising a second material having a negative Seebeck coefficient. The first conductor and the second conductor conduct electrical current through the semiconductor device and conduct heat away from the semiconductor device.

公开(公告)号：US10103083B2

公开(公告)日：2018-10-16

申请号：US15658438

申请日：2017-07-25

申请人： GLOBALFOUNDRIES INC.

发明人： Siyuranga O. Koswatta ,  Sungjae Lee ,  Lan Luo ,  Scott K. Springer ,  Richard A. Wachnik

IPC分类号： H01L27/16 ,  H01L23/38 ,  H01L35/20 ,  H01L35/22 ,  H01L35/04 ,  H01L35/28 ,  H01L35/34 ,  H01L35/16 ,  H01L35/18 ,  H01L27/12 ,  H01L23/522 ,  H01L23/528

摘要： A semiconductor structure comprises one or more semiconductor devices, each of the semiconductor devices having two or more electrical connections; one or more first conductors connected to a first electrical connection on the semiconductor device, the first conductor comprising a first material having a positive Seebeck coefficient; and one or more second conductors connected to a second electrical connection on the semiconductor device, the second conductor comprising a second material having a negative Seebeck coefficient. The first conductor and the second conductor conduct electrical current through the semiconductor device and conduct heat away from the semiconductor device.

公开(公告)号：US09906213B2

公开(公告)日：2018-02-27

申请号：US14934793

申请日：2015-11-06

申请人： GLOBALFOUNDRIES INC.

发明人： Gregory G. Freeman ,  Siyuranga O. Koswatta

IPC分类号： G05F1/00 ,  G05F1/12 ,  G05F1/648 ,  H03K17/04

CPC分类号： H03K17/04 ,  H03K19/00315 ,  H03K19/00369

摘要： An inverter circuit for reducing runaway current due to applied voltage stress and temperature conditions comprises: first and second field effect transistor (FET) devices of opposite device polarities for driving a connected second stage device having a connected 2nd stage first and second FET devices, each 2nd stage device having a respective input gate terminal. The first FET and second FET devices have a respective output drive terminal, a first conductive structure connects the first FET output drive terminal to the input gate terminal of each the first and second connected FET device and further connects the first FET output drive terminal to the second FET output drive terminal through a ballasting resistor device. A second separate conductive structure connects the second FET output drive terminal to the input gate terminals and includes a path further connecting the second FET output drive terminal to the first FET output drive terminal through the ballasting resistor device.

公开(公告)号：US20170133923A1

公开(公告)日：2017-05-11

申请号：US14934793

申请日：2015-11-06

申请人： GLOBALFOUNDRIES INC.

发明人： Gregory G. Freeman ,  Siyuranga O. Koswatta

IPC分类号： H02M1/32

CPC分类号： H03K17/04 ,  H03K19/00315 ,  H03K19/00369

摘要： An inverter circuit for reducing runaway current due to applied voltage stress and temperature conditions comprises: first and second field effect transistor (FET) devices of opposite device polarities for driving a connected second stage device having a connected 2nd stage first and second FET devices, each 2nd stage device having a respective input gate terminal. The first FET and second FET devices have a respective output drive terminal, a first conductive structure connects the first FET output drive terminal to the input gate terminal of each the first and second connected FET device and further connects the first FET output drive terminal to the second FET output drive terminal through a ballasting resistor device. A second separate conductive structure connects the second FET output drive terminal to the input gate terminals and includes a path further connecting the second FET output drive terminal to the first FET output drive terminal through the ballasting resistor device.

公开(公告)号：US09552455B2

公开(公告)日：2017-01-24

申请号：US14612683

申请日：2015-02-03

申请人： GLOBALFOUNDRIES INC.

发明人： Daniel J. Poindexter ,  Gregory G. Freeman ,  Siyuranga O. Koswatta ,  J. Campbell Scott ,  Leon J. Sigal ,  James D. Warnock

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5036

摘要： An efficient method of calculating maximum current limits for library gates in which a current limit includes the impact of self-heating effects associated with the maximum current. A maximum current solution is obtained in a self-consistent fashion, providing a way of determining the self-consistent solution in a rapid fashion without extensive numerical calculations or simulations. The present method provides a practical approach for characterizing a large library of gates for use in CMOS designs.

摘要翻译： 计算库门最大电流限制的有效方法，其中电流限制包括与最大电流相关联的自热效应的影响。 以自我一致的方式获得最大的当前解决方案，提供了一种在没有广泛的数值计算或模拟的情况下以快速方式确定自相矛盾解决方案的方式。 本方法提供了用于表征CMOS设计中使用的大型门库的实用方法。

公开(公告)号：US20160224717A1

公开(公告)日：2016-08-04

申请号：US14612683

申请日：2015-02-03

申请人： GLOBALFOUNDRIES INC.

发明人： Daniel J. Poindexter ,  Gregory G. Freeman ,  Siyuranga O. Koswatta ,  J. Campbell Scott ,  Leon J. Sigal ,  James D. Warnock

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5036

摘要： An efficient method of calculating maximum current limits for library gates in which a current limit includes the impact of self-heating effects associated with the maximum current. A maximum current solution is obtained in a self-consistent fashion, providing a way of determining the self-consistent solution in a rapid fashion without extensive numerical calculations or simulations. The present method provides a practical approach for characterizing a large library of gates for use in CMOS designs.

摘要翻译： 计算库门最大电流限制的有效方法，其中电流限制包括与最大电流相关联的自热效应的影响。 以自我一致的方式获得最大的当前解决方案，提供了一种在没有广泛的数值计算或模拟的情况下以快速方式确定自相矛盾解决方案的方式。 本方法提供了用于表征CMOS设计中使用的大型门库的实用方法。

公开(公告)号：US09773717B1

公开(公告)日：2017-09-26

申请号：US15242643

申请日：2016-08-22

申请人： GLOBALFOUNDRIES INC.

发明人： Siyuranga O. Koswatta ,  Sungjae Lee ,  Lan Luo ,  Scott K. Springer ,  Richard A. Wachnik

IPC分类号： H01L23/38 ,  H01L35/20 ,  H01L35/22 ,  H01L35/04 ,  H01L35/28 ,  H01L35/34 ,  H01L35/16 ,  H01L35/18 ,  H01L27/12 ,  H01L27/16

CPC分类号： H01L23/38 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/1203 ,  H01L27/16 ,  H01L35/04 ,  H01L35/16 ,  H01L35/18 ,  H01L35/20 ,  H01L35/22 ,  H01L35/28 ,  H01L35/34

摘要： A semiconductor structure comprises one or more semiconductor devices, each of the semiconductor devices having two or more electrical connections; one or more first conductors connected to a first electrical connection on the semiconductor device, the first conductor comprising a first material having a positive Seebeck coefficient; and one or more second conductors connected to a second electrical connection on the semiconductor device, the second conductor comprising a second material having a negative Seebeck coefficient. The first conductor and the second conductor conduct electrical current through the semiconductor device and conduct heat away from the semiconductor device.