公开(公告)号：US08592283B2

公开(公告)日：2013-11-26

申请号：US13137622

申请日：2011-08-30

申请人： Fuminori Ito ,  Yoshihiro Hayashi ,  Tsuneo Takeuchi

发明人： Fuminori Ito ,  Yoshihiro Hayashi ,  Tsuneo Takeuchi

IPC分类号： H01L21/70

CPC分类号： H01L21/76825 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76835 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device manufacturing method for manufacturing a semiconductor device having a transistor mounted in a wiring of a plural-layer structure includes in manufacturing the semiconductor device that is formed on a semiconductor element and includes a barrier insulating film, a porous interlayer insulating film, a wiring, a via plug formed by embedding a metal wiring material in a wiring trench, and a via hole formed in the porous interlayer insulating film, irradiating an electron beam or an ultraviolet ray onto at least a portion of the porous interlayer insulating film before forming an opening in the barrier insulating film.

摘要翻译： 一种用于制造具有安装在多层结构的布线中的晶体管的半导体器件的半导体器件制造方法包括：制造形成在半导体元件上的半导体器件，其包括阻挡绝缘膜，多孔层间绝缘膜， 布线，通过在布线沟槽中嵌入金属布线材料形成的通孔塞和形成在多孔层间绝缘膜中的通孔，在形成前在多孔层间绝缘膜的至少一部分上照射电子束或紫外线 隔离绝缘膜的开口。

公开(公告)号：US08039921B2

公开(公告)日：2011-10-18

申请号：US11991939

申请日：2006-09-15

申请人： Fuminori Ito ,  Yoshihiro Hayashi ,  Tsuneo Takeuchi

发明人： Fuminori Ito ,  Yoshihiro Hayashi ,  Tsuneo Takeuchi

IPC分类号： H01L21/70

CPC分类号： H01L21/76825 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76835 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device with a high-strength porous modified layer having a pore size of 1 nm or less, which is formed, in a multilayer wiring forming process, by forming a via hole and a wiring trench in a via interlayer insulating film and a wiring interlayer insulting film and then irradiating an electron beam or an ultraviolet ray onto the opening side walls.

摘要翻译： 一种半导体器件，其具有通过在通孔层间绝缘膜和布线中形成通孔和布线沟槽而形成的在多层布线形成工艺中形成的孔径为1nm以下的高强度多孔改性层 层间绝缘膜，然后将电子束或紫外线照射到开口侧壁上。

公开(公告)号：US20110318926A1

公开(公告)日：2011-12-29

申请号：US13137622

申请日：2011-08-30

申请人： Fuminori Ito ,  Yoshihiro Hayashi ,  Tsuneo Takeuchi

发明人： Fuminori Ito ,  Yoshihiro Hayashi ,  Tsuneo Takeuchi

IPC分类号： H01L21/302

CPC分类号： H01L21/76825 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76835 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device manufacturing method for manufacturing a semiconductor device having a transistor mounted in a wiring of a plural-layer structure includes in manufacturing the semiconductor device that is formed on a semiconductor element and includes a barrier insulating film, a porous interlayer insulating film, a wiring, a via plug formed by embedding a metal wiring material in a wiring trench, and a via hole formed in the porous interlayer insulating film, irradiating an electron beam or an ultraviolet ray onto at least a portion of the porous interlayer insulating film before forming an opening in the barrier insulating film.

摘要翻译： 一种用于制造具有安装在多层结构的布线中的晶体管的半导体器件的半导体器件制造方法包括：制造形成在半导体元件上的半导体器件，其包括阻挡绝缘膜，多孔层间绝缘膜， 布线，通过在布线沟槽中嵌入金属布线材料形成的通孔塞和形成在多孔层间绝缘膜中的通孔，在形成前在多孔层间绝缘膜的至少一部分上照射电子束或紫外线 隔离绝缘膜的开口。

公开(公告)号：US20090072403A1

公开(公告)日：2009-03-19

申请号：US11991939

申请日：2006-09-15

申请人： Fuminori Ito ,  Yoshihiro Hayashi ,  Tsuneo Takeuchi

发明人： Fuminori Ito ,  Yoshihiro Hayashi ,  Tsuneo Takeuchi

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L21/76825 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76835 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device with a high-strength porous modified layer having a pore size of 1 nm or less, which is formed, in a multilayer wiring forming process, by forming a via hole and a wiring trench in a via interlayer insulating film and a wiring interlayer insulting film and then irradiating an electron beam or an ultraviolet ray onto the opening side walls.

摘要翻译： 一种半导体器件，其具有通过在通孔层间绝缘膜和布线中形成通孔和布线沟槽而形成的在多层布线形成工艺中形成的孔径为1nm以下的高强度多孔改性层 层间绝缘膜，然后将电子束或紫外线照射到开口侧壁上。

公开(公告)号：US08937023B2

公开(公告)日：2015-01-20

申请号：US13363638

申请日：2012-02-01

申请人： Fuminori Ito ,  Yoshihiro Hayashi

发明人： Fuminori Ito ,  Yoshihiro Hayashi

IPC分类号： H01L23/48 ,  H01L21/316 ,  C23C16/40 ,  C23C18/12 ,  C23C18/14 ,  H01L21/02

CPC分类号： H01L21/31695 ,  C23C16/401 ,  C23C18/1212 ,  C23C18/122 ,  C23C18/14 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/02362

摘要： A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.

摘要翻译： 一种方法包括通过引入具有环状硅氧烷作为骨架并具有至少一个与侧链结合的挥发性烃基的环状硅氧烷化合物，将含硅化合物引入等离子体中，在基板上形成绝缘膜， 通过向绝缘膜添加能量将绝缘膜与多孔绝缘膜接合。 与环状硅氧烷化合物，挥发性烃基，环状硅氧烷化合物和挥发性烃基的键相比，含硅化合物的分解能力较少。

公开(公告)号：US08043957B2

公开(公告)日：2011-10-25

申请号：US12299375

申请日：2007-05-16

申请人： Munehiro Tada ,  Hiroto Ohtake ,  Fuminori Ito ,  Yoshihiro Hayashi ,  Hironori Yamamoto

发明人： Munehiro Tada ,  Hiroto Ohtake ,  Fuminori Ito ,  Yoshihiro Hayashi ,  Hironori Yamamoto

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L23/53295 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a multilayer wiring technology by which high adhesiveness and high insulation reliability between wirings are obtained, while maintaining effective low capacitance between wirings. A semiconductor device is characterized in that a first insulating film is an insulating film formed of at least one layer which contains a siloxane structure containing silicon, oxygen and carbon; the siloxane structure in the inner part of the first insulating film contains a larger number of carbon atoms than the number of silicon atoms; and a modified layer which containing a smaller number of carbon atoms and a larger number of oxygen atoms per unit volume than the inner part of the first insulating film is formed on at least one of an interface between the first insulating film and the metal and an interface between the first insulating film and a second insulating film.

摘要翻译： 本发明提供了一种多层布线技术，其中在布线之间保持有效的低电容的同时获得了布线之间的高粘合性和高绝缘可靠性。 半导体器件的特征在于，第一绝缘膜是由至少一层包含含有硅，氧和碳的硅氧烷结构的层形成的绝缘膜; 第一绝缘膜的内部的硅氧烷结构含有比硅原子数多的碳原子数; 并且在第一绝缘膜和金属之间的界面中的至少一个上形成有含有比第一绝缘膜的内部少的碳原子数和更多数量的单位体积的氧原子的改性层， 第一绝缘膜和第二绝缘膜之间的界面。

公开(公告)号：US20100025852A1

公开(公告)日：2010-02-04

申请号：US12518688

申请日：2007-12-20

申请人： Makoto Ueki ,  Hironori Yamamoto ,  Yoshihiro Hayashi ,  Fuminori Ito ,  Yoshiyuki Fukumoto

发明人： Makoto Ueki ,  Hironori Yamamoto ,  Yoshihiro Hayashi ,  Fuminori Ito ,  Yoshiyuki Fukumoto

IPC分类号： H01L23/48 ,  H01L21/312 ,  H01L21/768

CPC分类号： H01L21/31633 ,  C23C16/30 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/3122 ,  H01L21/31695 ,  H01L21/76807 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： To suppress deterioration in reliability of wiring and to reduce effective dielectric constant of wiring. In a semiconductor device, copper-containing wirings are covered by barrier insulating films, and the barrier insulating films contain a component of an organic silica containing unsaturated hydrocarbon and amorphous carbon. The copper-containing wirings are covered by the barrier insulating films that contain a component that is in an organic silica structure containing unsaturated hydrocarbon and amorphous carbon. Accordingly, inter-wiring capacitance is reduced without deteriorating reliability of the copper-containing wiring, thereby realizing a high-speed LSI with low power consumption.

摘要翻译： 抑制布线可靠性的劣化，降低布线的有效介电常数。 在半导体器件中，含铜布线被阻挡绝缘膜覆盖，隔离绝缘膜含有含有不饱和烃和无定形碳的有机二氧化硅的成分。 含铜配线被含有含有不饱和烃和无定形碳的有机二氧化硅结构的成分的阻隔绝缘膜覆盖。 因此，在不劣化含铜布线的可靠性的情况下降低布线间电容，从而实现低功耗的高速LSI。

公开(公告)号：US20070013069A1

公开(公告)日：2007-01-18

申请号：US10558367

申请日：2004-05-28

申请人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

发明人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multilayer wiring structure for connecting a semiconductor device is disclosed which is obtained by forming metal wirings on a substrate in which the semiconductor device is formed. The wiring structure free from such conventional problems that insulation between wirings next to each other is damaged or insulation resistance between wirings next to each other is deteriorated by generation of leakage current when fine metal wirings are formed in a porous insulating film. A method for producing such a wiring structure is also disclosed. In the metal wiring structure on the substrate in which the semiconductor device is formed, a insulating barrier layer (413) containing an organic matter is formed between an interlayer insulating film and a metal wiring. This insulating barrier layer reduces leakage current between wirings next to each other, thereby improving insulation reliability.

摘要翻译： 公开了一种用于连接半导体器件的多层布线结构，其通过在其中形成半导体器件的基板上形成金属布线而获得。 布线结构没有这样的常规问题，即在多孔绝缘膜中形成细金属布线时，通过产生漏电流而使彼此相邻的布线之间的绝缘损坏或彼此相邻的布线之间的绝缘电阻恶化。 还公开了一种用于制造这种布线结构的方法。 在形成了半导体器件的基板上的金属布线结构中，在层间绝缘膜和金属布线之间形成含有有机物质的绝缘阻挡层（413）。 该绝缘阻挡层减少彼此相邻的布线之间的漏电流，从而提高绝缘可靠性。

公开(公告)号：US08592303B2

公开(公告)日：2013-11-26

申请号：US12715088

申请日：2010-03-01

申请人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

发明人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

IPC分类号： H01L21/4763

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： There are provided with a wiring structure and a method for manufacturing the same wherein in a wiring structure of multi-layered wiring in which a metal wiring is formed on a substrate forming a semiconductor element thereby obtaining connection of the element, no damage to insulation property between the abutting wirings by occurrence of leakage current and no deterioration of insulation resistance property between the abutting wirings are achieved in case that fine metal wiring is formed in a porous insulation film. The insulation barrier layer 413 is formed between an interlayer insulation film and the metal wiring, in the metal wiring structure on the substrate forming the semiconductor element. The insulation barrier layer enables to reduce leakage current between the abutting wirings and to elevate the insulation credibility.

摘要翻译： 提供一种布线结构及其制造方法，其中在形成半导体元件的基板上形成金属布线的多层布线的布线结构中，从而获得元件的连接，不会损坏绝缘性能 在多孔绝缘膜中形成细小的金属布线的情况下，可以通过发生漏电流而在邻接布线之间形成邻接布线之间的绝缘电阻特性。 在形成半导体元件的基板上的金属布线结构中，在层间绝缘膜和金属布线之间形成绝缘阻挡层413。 绝缘阻挡层能够减少邻接布线之间的泄漏电流并提高绝缘可靠性。

公开(公告)号：US07701060B2

公开(公告)日：2010-04-20

申请号：US10558367

申请日：2004-05-28

申请人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

发明人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

IPC分类号： H01L23/48

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： There are provided with a wiring structure and a method for manufacturing the same wherein in a wiring structure of multi-layered wiring in which a metal wiring is formed on a substrate forming a semiconductor element thereby obtaining connection of the element, no damage to insulation property between the abutting wirings by occurrence of leakage current and no deterioration of insulation resistance property between the abutting wirings are achieved in case that fine metal wiring is formed in a porous insulation film. The insulation barrier layer 413 is formed between an interlayer insulation film and the metal wiring, in the metal wiring structure on the substrate forming the semiconductor element. The insulation barrier layer enables to reduce leakage current between the abutting wirings and to elevate the insulation credibility.

摘要翻译： 提供一种布线结构及其制造方法，其中在形成半导体元件的基板上形成金属布线的多层布线的布线结构中，从而获得元件的连接，不会损坏绝缘性能 在多孔绝缘膜中形成细小的金属布线的情况下，可以通过发生漏电流而在邻接布线之间形成邻接布线之间的绝缘电阻特性。 在形成半导体元件的基板上的金属布线结构中，在层间绝缘膜和金属布线之间形成绝缘阻挡层413。 绝缘阻挡层能够减少邻接布线之间的泄漏电流并提高绝缘可靠性。