公开(公告)号：US20250156363A1

公开(公告)日：2025-05-15

申请号：US18913275

申请日：2024-10-11

Applicant: Fujitsu Limited

Inventor： Ichiro YOKOKURA ,  Junichi SUGIYAMA ,  Yusuke TANABE

IPC: G06F13/42 ,  G06F3/06 ,  H04L67/1097

Abstract: A memory drive device includes a memory, and a processor coupled to the memory and configured to when receiving a specific packet according to a connection standard specified in Computer eXpress Link (CXL), store data included as a part of the specific packet in a buffer and determine whether addresses included as the part of the specific packet together with the data are consecutive, when the addresses are consecutive, generate first information in which information of the addresses that are consecutive and information of the data associated with the addresses that are consecutive are aggregated, and notify a memory device of a write request of the data to the memory device, based on the first information and the communication standard when the data stored in the buffer is written to the memory device specified by a communication standard that does not support the CXL.

公开(公告)号：US20240427499A1

公开(公告)日：2024-12-26

申请号：US18650171

申请日：2024-04-30

Applicant: Fujitsu Limited

Inventor： Ichiro YOKOKURA ,  Junichi SUGIYAMA ,  Yusuke TANABE

IPC: G06F3/06

Abstract: A transmission device transmits signals between a server and an opposing device. The transmission device includes a memory and includes a controller that controls a first queue and a second queue in the server and controls the memory. When detecting issuance of a processing request from the server to the opposing device, the controller queues the processing request in the first queue, obtains the data from the server according to the processing request, and stores the obtained data in the memory. After requesting the transfer of the data and the processing request to the opposing device, before executing the processing request in the opposing device, the controller queues the processing completion of the processing in the second queue and releases the queue of the processing completion.

公开(公告)号：US20130222021A1

公开(公告)日：2013-08-29

申请号：US13770665

申请日：2013-02-19

Applicant: Fujitsu Limited

Inventor： Junichi SUGIYAMA ,  Hiroyuki HOMMA ,  Toru KATAGIRI ,  Ichiro YOKOKURA

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H04J3/0691 ,  H04J3/1664

Abstract: A transmitting apparatus includes a first circuit to which a base clock and a first clock condition are input, the first circuit outputting a first enable signal based on the base clock and the first clock condition; a second circuit to which the base clock and a second clock condition are input, the second circuit outputting a second enable signal based on the base clock and the second clock condition; a first frame processing circuit receiving a first frame input signal and the first enable signal to output a first frame output signal in synchronization with the first enable signal; and a second frame processing circuit receiving a second frame input signal and the second enable signal to output a second frame output signal in synchronization with the second enable signal.

Abstract translation: 发送装置包括：基本时钟和第一时钟条件被输入的第一电路，第一电路基于基本时钟和第一时钟条件输出第一使能信号; 输入基本时钟和第二时钟条件的第二电路，第二电路基于基本时钟和第二时钟条件输出第二使能信号; 接收第一帧输入信号的第一帧处理电路和与第一使能信号同步地输出第一帧输出信号的第一使能信号; 以及第二帧处理电路，接收第二帧输入信号和第二使能信号，以与第二使能信号同步地输出第二帧输出信号。

公开(公告)号：US20230087839A1

公开(公告)日：2023-03-23

申请号：US17941643

申请日：2022-09-09

Applicant: FUJITSU LIMITED

Inventor： Ichiro YOKOKURA ,  Junichi SUGIYAMA ,  Makoto SHIMIZU ,  Toshihiro SUZUKI ,  Takeshi NOMA ,  Hisao NAKASHIMA ,  Yuji IKEGAMI

IPC: H04B10/079

Abstract: First transmission device includes a first counter that generates counter value incremented in a specified cycle. Second transmission device includes a second counter that generates counter value incremented in the specified cycle. Polarization variation monitoring device acquires a first counter value generated by the first counter and a second counter value extracted by the first transmission device from a received frame transmitted from the second transmission device when the first transmission device detects polarization variation, and a third counter value generated by the second counter and a fourth counter value extracted by the second transmission device from a frame transmitted from the first transmission device when the second detector detects the polarization variation. The polarization variation monitoring device determines an occurrence position of the polarization variation based on the first counter value, the second counter value, the third counter value and the fourth counter value.

公开(公告)号：US20230082206A1

公开(公告)日：2023-03-16

申请号：US17841989

申请日：2022-06-16

Applicant: FUJITSU LIMITED

Inventor： Ichiro YOKOKURA ,  Junichi SUGIYAMA ,  Makoto SHIMIZU ,  Toshihiro SUZUKI ,  Takeshi NOMA ,  Hisao NAKASHIMA

IPC: H04B10/532 ,  H04B10/61 ,  H04B10/077

Abstract: First transmission device includes a first counter that generates counter value incremented in a specified cycle. Second transmission device includes a second counter that. generates counter value incremented in the specified cycle. Polarization variation monitoring device acquires a first counter value generated by the first counter and a second counter value extracted by the first transmission device from a received frame transmitted from the second transmission device when the first transmission device detects polarization variation, and a third counter value generated by the second counter and a fourth counter value extracted by the second transmission device from a frame transmitted from the first transmission. device when the second detector detects the polarization variation. The polarization variation monitoring device determines an occurrence position of the polarization variation based on the first counter value, the second counter value, the third counter value and the fourth counter value.

公开(公告)号：US20170115687A1

公开(公告)日：2017-04-27

申请号：US15272799

申请日：2016-09-22

Applicant: FUJITSU LIMITED

Inventor： Ichiro YOKOKURA

IPC: G06F1/12 ,  H04B10/27 ,  H04L7/00 ,  G11C27/04 ,  H03K19/177

CPC classification number: G06F1/12 ,  G11C19/28 ,  H03K19/17728 ,  H04B10/27 ,  H04J3/0691 ,  H04J3/1652 ,  H04L7/0075

Abstract: There is provided a transmission apparatus including: a shift register configured to generate a plurality of timing pulses indicating different timings, from a frame pulse synchronized with a frame signal; and a plurality of signal processors configured to sequentially process the frame signal based on timings indicated by one or more timing pulses among the plurality of timing pulses.