公开(公告)号：US20070290906A1

公开(公告)日：2007-12-20

申请号：US10565929

申请日：2004-07-15

Applicant: Derk Reefman ,  Pieter Harpe ,  Erwin Janssen

Inventor： Derk Reefman ,  Pieter Harpe ,  Erwin Janssen

IPC: H03M3/02

CPC classification number: H03M7/3011 ,  H03M7/3028

Abstract: Improved sigma-delta modulator (SDM) for 1-bit digital audio noise shaping. It is the object to produce a bit stream that is compatible with the Scarlet Book specification (Super Audio CD standard, SACD) and that achieves a higher lossless compression ratio when compressed and decompressed according to the standard. This goal is achieved by using a trellis-based SDM and/or a prediction filter within the SDM that is similar or identical to the prediction filter in the encoder. The trellis SDM is designed to produce a predicted signal from a range of candidate signals that is as close to the input signal as possible.

Abstract translation: 改进的Σ-Δ调制器（SDM）用于1位数字音频噪声整形。 产生与Scarlet Book规范（Super Audio CD标准，SACD）兼容的比特流的目的是在根据标准进行压缩和解压缩时实现更高的无损压缩比。 该目标通过使用与编码器中的预测滤波器相似或相同的SDM内的基于网格的SDM和/或预测滤波器来实现。 网格SDM被设计为从尽可能接近输入信号的候选信号的范围产生预测信号。

公开(公告)号：US20090287493A1

公开(公告)日：2009-11-19

申请号：US11915478

申请日：2006-05-16

Applicant: Erwin Janssen ,  Derk Reefman

Inventor： Erwin Janssen ,  Derk Reefman

IPC: G10L19/00 ,  H03M3/00 ,  H03M1/06

CPC classification number: H03M7/3006 ,  G10L19/167 ,  G11B20/10481 ,  G11B20/10527 ,  G11B20/1262 ,  G11B2020/00014 ,  G11B2020/00065 ,  G11B2020/10546 ,  G11B2020/1288 ,  G11B2220/2541 ,  G11B2220/2579 ,  H03M7/3028

Abstract: An audio coding scheme allowing PCM signal to lossless DSD signal expansion for next generation optical disc formats. The method of encoding an input DSD signal includes up-sampling a corresponding PCM signal to the DSD sample rate. Then a set of loop filter parameters for a noise-shaping loop of a sigma-delta modulator are generated, either using a random starting condition of the sigma-delta modulator or including synchronization parameters. This will allow a decoder to regenerate an almost perfect signal, but still it needs a correction signal to be able to bit identically regenerate the DSD input signal. Therefore, a correction signal is generated based on a difference between a sigma-delta modulated version of the up-sampled PCM signal and the input DSD signal, wherein the sigma-delta modulated version of the up-sampled PCM signal is obtained using the set of loop filter parameters. The correction signal may be adapted to be applied to the low bit PCM signal, to the up-sampled PCM signal or to the output bit stream. Finally, an expansion bit stream is generated where an encoded version of the set of loop filter parameters and an encoded version of the correction signal are included. The decoder can reproduce the original DSD signal based on the already available PCM signal and the described expansion bit stream. Thus, the coding scheme enables top quality audio with minimal storage overhead since the already available PCM signal is used in combination with an expansion bit stream. Since only an additional data stream is required to be stored on a disc, e.g. as part of an MPEG stream, DSD functionality is added to existing systems without causing compatibility problems.

Abstract translation: 音频编码方案允许PCM信号对下一代光盘格式的无损DSD信号扩展。 编码输入DSD信号的方法包括将对应的PCM信号上采样到DSD采样率。 然后，使用Σ-Δ调制器的随机起始条件或包括同步参数来生成Σ-Δ调制器的噪声整形环路的一组环路滤波器参数。 这将允许解码器重新生成几乎完美的信号，但是仍然需要一个校正信号以能够相同地重新生成DSD输入信号。 因此，基于上采样PCM信号的Σ-Δ调制版本与输入DSD信号之间的差产生校正信号，其中使用该集合获得上采样PCM信号的Σ-Δ调制版本 的环路滤波器参数。 校正信号可适用于低位PCM信号，上采样PCM信号或输出比特流。 最后，生成扩展位流，其中包括一组环路滤波器参数的编码版本和校正信号的编码版本。 解码器可以基于已经可用的PCM信号和所描述的扩展位流再现原始DSD信号。 因此，由于已经可用的PCM信号与扩展位流结合使用，所以编码方案实现了具有最小存储开销的顶级质量音频。 由于只需要另外的数据流来存储在盘上， 作为MPEG流的一部分，DSD功能被添加到现有系统中，而不会引起兼容性问题。

公开(公告)号：US07218263B2

公开(公告)日：2007-05-15

申请号：US10574442

申请日：2004-10-08

Applicant: Erwin Janssen ,  Derk Reefman

Inventor： Erwin Janssen ,  Derk Reefman

IPC: H03M1/12

CPC classification number: H03M7/3006 ,  H03M3/35 ,  H03M3/458 ,  H03M3/50 ,  H03M7/302

Abstract: A system (10) and method that generate bit-streams that result in higher compression gains. The system is akin to a normal 1-bit SDM. Internally, the system (10) tries to find the best possible bit sequence by tracing N possible solutions at every time instant. In an implementation, the system has N>I trellis path structures (20). Every path is used to track a possible output bitstream. The quality of a bitstream is determined by measuring the (frequency weighted) difference between input and output; it is this measure that is reduced or minimized.

公开(公告)号：US20070052556A1

公开(公告)日：2007-03-08

申请号：US10552771

申请日：2004-04-15

Applicant: Erwin Janssen ,  Derk Reefman

Inventor： Erwin Janssen ,  Derk Reefman

IPC: H03M7/00

CPC classification number: H03H17/0294 ,  H03H2017/0295

Abstract: An adaptive filtering device and method where at least one adaptive filter receives an input signal and a metering device receives an output of the at least one adaptive filter, monitors a characteristic of the output, such as power of high-frequency components, and forwards a correction signal in a feedback loop to adjust the characteristic of the at least one filter in order to change the characteristic of the output. An adaptive filtering device (200) and method where two low-pass FIR filters (202, 204) receive an input signal, a weighted adder (206) receives outputs from the two low-pass FIR filters and changes a weighting of each to produce filtered output data, and a controller (208) that receives a cutoff frequency (203), supplies the cut-off frequency to the two low-pass FIR filters, and supplies a signal to the weighted adder for varying the weighting of each of the low-pass FIR filters to switch therebetween.

Abstract translation: 一种自适应滤波装置和方法，其中至少一个自适应滤波器接收输入信号，并且计量装置接收所述至少一个自适应滤波器的输出，监视输出的特性，例如高频分量的功率，并转发 校正信号，以调整至少一个滤波器的特性，以改变输出的特性。 一种自适应滤波装置（200）和方法，其中两个低通FIR滤波器（202,204）接收输入信号，加权加法器（206）接收来自两个低通FIR滤波器的输出并改变每个低通FIR滤波器的加权以产生 滤波后的输出数据和接收截止频率（203）的控制器（208）将截止频率提供给两个低通FIR滤波器，并将信号提供给加权加法器，以改变每个 低通FIR滤波器在其间切换。

公开(公告)号：US20070018857A1

公开(公告)日：2007-01-25

申请号：US10574442

申请日：2004-10-08

Applicant: Erwin Janssen ,  Derk Reefman

Inventor： Erwin Janssen ,  Derk Reefman

IPC: H03M7/00

CPC classification number: H03M7/3006 ,  H03M3/35 ,  H03M3/458 ,  H03M3/50 ,  H03M7/302

Abstract: A system (10) and method that generate bit-streams that result in higher compression gains. The system is akin to a normal 1-bit SDM. Internally, the system (10) tries to find the best possible bit sequence by tracing N possible solutions at every time instant. In an implementation, the system has N>I trellis path structures (20). Every path is used to track a possible output bitstream. The quality of a bitstream is determined by measuring the (frequency weighted) difference between input and output; it is this measure that is reduced or minimized.

Abstract translation: 产生导致更高压缩增益的比特流的系统（10）和方法。 该系统类似于正常的1位SDM。 在内部，系统（10）尝试通过在每个时刻跟踪N个可能的解来找到最佳可能的位序列。 在一个实现中，系统具有N> I网格路径结构（20）。 每个路径用于跟踪可能的输出比特流。 通过测量输入和输出之间的（频率加权）差异来确定比特流的质量; 这是减少或最小化的措施。

公开(公告)号：US20060049970A1

公开(公告)日：2006-03-09

申请号：US10529358

申请日：2003-08-08

Applicant: Derk Reefman ,  Erwin Janssen

Inventor： Derk Reefman ,  Erwin Janssen

IPC: H03M3/00

CPC classification number: H03M3/394 ,  H03M3/43

Abstract: Sigma-delta modulation is provided, wherein an input signal is feeded to at least two parallel filters, a first one of the filters preferably being a lower order filter and a second one of the filters preferably being a higher order filter, wherein output of the filters are weighted and wherein the weighted output from the at least two filters is quantized, in order to enable a sigma-delta modulation with variable order.

Abstract translation: 提供了Σ-Δ调制，其中输入信号被馈送到至少两个并行滤波器，滤波器中的第一滤波器优选地是低阶滤波器，并且滤波器中的第二滤波器优选地是较高阶滤波器，其中输出信号 滤波器被加权，并且其中来自至少两个滤波器的加权输出被量化，以便能够以可变顺序进行Σ-Δ调制。

公开(公告)号：US07330142B2

公开(公告)日：2008-02-12

申请号：US10552779

申请日：2004-04-13

Applicant: Erwin Janssen ,  Derk Reefman

Inventor： Erwin Janssen ,  Derk Reefman

IPC: H03M3/00

CPC classification number: H03M7/3035 ,  H03M3/43 ,  H03M3/444 ,  H03M3/452 ,  H03M3/454 ,  H03M7/3028 ,  H03M7/3037 ,  H03M7/304

Abstract: A sigma-delta modulator (SDM) including n (n>_1) integrators in series, where a first of the n integrators receiving an input signal, at least one Q device, which acts as a quantizer when an absolute value of a signal input thereto is smaller and as a gain element (either with or without offset) when the absolute value of the signal input thereto is larger, and a device for quantizing an output of the unit. The SDM may be a feed back or feed forward SDM. The SDM may include a single or multiple Q devices. The single Q device may be positioned so that the signal input to the one Q device is an output of the last integrator and the output of the one device Q1 is input to the device for quantizing and/or to the n integrators. For multiple Q devices, each of the Q devices may have different parameters set to improve stability, improve SNR, and/or reduce introduction of artifacts. The SDM may be part of an analog to digital converter and/or a digital to digital converter. The SDM may process digital or analog signals, for example, a 1-bit signal.

Abstract translation: 包括串联的n（n> _1）积分器的Σ-Δ调制器（SDM），其中接收输入信号的n个积分器中的第一个，至少一个Q器件，当信号输入的绝对值作为量化器时 当其输入的信号的绝对值较大时，其较小，并且作为增益元件（有或没有偏移），以及用于量化该单元的输出的装置。 SDM可以是反馈或前馈SDM。 SDM可以包括单个或多个Q设备。 单个Q设备可以被定位成使得输入到一个Q设备的信号是最后一个积分器的输出，并且一个设备Q 1的输出被输入到用于量化的设备和/或 给n个集成商。 对于多个Q设备，每个Q设备可以具有不同的参数来设置以提高稳定性，改善SNR，和/或减少伪像的引入。 SDM可以是模数转换器和/或数模转换器的一部分。 SDM可以处理数字或模拟信号，例如1位信号。

公开(公告)号：US20070035424A1

公开(公告)日：2007-02-15

申请号：US10552779

申请日：2004-04-13

Applicant: Erwin Janssen ,  Derk Reefman

Inventor： Erwin Janssen ,  Derk Reefman

IPC: H03M3/00

CPC classification number: H03M7/3035 ,  H03M3/43 ,  H03M3/444 ,  H03M3/452 ,  H03M3/454 ,  H03M7/3028 ,  H03M7/3037 ,  H03M7/304

Abstract: A sigma-delta modulator (SDM) including n (n>_1) integrators in series, where a first of the n integrators receiving an input signal, at least one Q device, which acts as a quantizer when an absolute value of a signal input thereto is smaller and as a gain element (either with or without offset) when the absolute value of the signal input thereto is larger, and a device for quantizing an output of the unit. The SDM may be a feed back or feed forward SDM. The SDM may include a single or multiple Q devices. The single Q device may be positioned so that the signal input to the one Q device is an output of the last integrator and the output of the one device Q, is input to the device for quantizing and/or to the n integrators. For multiple Q devices, each of the Q devices may have different parameters set to improve stability, improve SNR, and/or reduce introduction of artifacts. The SDM may be part of an analog to digital converter and/or a digital to digital converter. The SDM may process digital or analog signals, for example, a 1-bit signal.

Abstract translation: 包括串联的n（n> _1）积分器的Σ-Δ调制器（SDM），其中接收输入信号的n个积分器中的第一个，至少一个Q器件，当信号输入的绝对值作为量化器时 当其输入的信号的绝对值较大时，其较小，并且作为增益元件（有或没有偏移），以及用于量化该单元的输出的装置。 SDM可以是反馈或前馈SDM。 SDM可以包括单个或多个Q设备。 单个Q器件可以被定位成使得输入到一个Q器件的信号是最后一个积分器的输出，并且一个器件Q的输出被输入到用于量化和/或向n个积分器的器件。 对于多个Q设备，每个Q设备可以具有不同的参数来设置以提高稳定性，改善SNR，和/或减少伪像的引入。 SDM可以是模数转换器和/或数模转换器的一部分。 SDM可以处理数字或模拟信号，例如1位信号。

公开(公告)号：US08436759B2

公开(公告)日：2013-05-07

申请号：US13123610

申请日：2009-10-05

Applicant: Konstantinos Doris ,  Erwin Janssen

Inventor： Konstantinos Doris ,  Erwin Janssen

IPC: H03M1/12

CPC classification number: H03M1/0614 ,  H03M1/1215 ,  H03M1/466

Abstract: This invention relates to Analog to Digital Converters (ADC) and, inter alia, to Time Interleaved ADCs and Successive Approximation Register (SAR) ADC's. In a conventional Time Interleaved ADC employing SAR ADC units, the input signal is processed through a track-and-hold circuit (T/H), and then through a buffer circuit, before the SAR ADC unit. There, by means of a comparator, the signal is compared with a Digital-to-Analog Converter (DAC) signal from the SAR logic. The buffer reduces the influence of capacitive loading and physical layout design on the SAR ADC input, but typically has a non-linear response and thus introduces distortion to the input signal. This can limit the ADC linearity, particularly for high-speed ADCs operating with low-supply voltages. An objective of the invention is to reduce or eliminate the effect of the buffer non-linearity. This is done in some embodiments by routing both the signals to the comparator through the same buffer circuit. In another embodiment the DAC signal is routed through a separate second buffer circuit. By use of a single buffer circuit, or where there is ideal matching of the buffer circuits in the latter embodiment, the distortion effects are completely eliminated; however, for practical imperfectly matched buffer circuits according to the latter embodiment, the gain and off-set mismatches can be accommodated through calibration of the buffers or, in suitable applications, through the DAC calibration.

Abstract translation: 本发明涉及模数转换器（ADC），尤其涉及时间交错ADC和连续近似寄存器（SAR）ADC。 在采用SAR ADC单位的常规时间交错ADC中，输入信号通过跟踪保持电路（T / H），然后通过缓冲电路在SAR ADC单元之前进行处理。 在这里，通过比较器将信号与来自SAR逻辑的数模转换器（DAC）信号进行比较。 缓冲器减小了电容负载和物理布局设计对SAR ADC输入的影响，但通常具有非线性响应，从而对输入信号引入失真。 这可能会限制ADC的线性度，特别是对于使用低电源电压运行的高速ADC。 本发明的目的是减少或消除缓冲器非线性的影响。 这在一些实施例中通过将信号通过相同的缓冲器电路路由到比较器来完成。 在另一个实施例中，DAC信号被路由通过单独的第二缓冲电路。 通过使用单个缓冲电路，或者在后面的实施例中存在缓冲电路的理想匹配的情况下，失真效应被完全消除; 然而，对于根据后一实施例的实际不完全匹配的缓冲器电路，增益和偏移不匹配可以通过缓冲器的校准或者在适当的应用中通过DAC校准来适应。

公开(公告)号：US4301721A

公开(公告)日：1981-11-24

申请号：US141807

申请日：1980-04-21

Applicant: Karl-Heinz Liessen ,  Erwin Janssen

Inventor： Karl-Heinz Liessen ,  Erwin Janssen

IPC: B30B3/04 ,  D21G1/00 ,  D21G1/02 ,  F16C13/02 ,  F16C23/00 ,  F16C7/04 ,  F16C35/00

CPC classification number: D21G1/0226 ,  B30B3/04 ,  D21G1/002 ,  F16C13/02 ,  F16C23/00

Abstract: A roll-journal bearing mounting is provided by a movable bearing housing from which pistons rigidly extend in opposite directions into cylinders rigidly fixed against displacement. Introduction of pressurized fluid to the cylinders moves the bearing housing either way in the direction of the pistons and cylinders. Consequently, a roll journaled by bearings in the bearing housings of two of the mountings can be moved towards and from a counter roll to apply roll nip pressure. At the same time the rigidly extending pistons in their rigidly fixed cylinders also function to hold the journal loading in a right angular direction, eliminating the need for the use of separate devices for that purpose.

Abstract translation: 滚动轴颈轴承安装件由可动轴承壳体提供，活塞刚性地沿相反方向延伸到刚性地固定抵抗位移的气缸中。 将加压流体引入气缸将轴承壳体沿活塞和气缸的方向移动。 因此，通过两个安装件的轴承座中的轴承轴承的辊可以朝向和来自反向辊移动以施加辊隙压力。 同时，其刚性固定的圆柱体中的刚性延伸的活塞也起到将轴颈加载保持在正确的角度方向的作用，从而无需为此目的使用单独的装置。