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    FORWARD ERROR CORRECTION WITH TURBO/NON-TURBO SWITCHING
    2.
    发明申请
    FORWARD ERROR CORRECTION WITH TURBO/NON-TURBO SWITCHING 有权
    带涡轮/非涡轮开关的前向错误校正

    公开(公告)号：US20150326253A1

    公开(公告)日：2015-11-12

    申请号：US14704385

    申请日：2015-05-05

    Applicant: Cisco Technology, Inc.

    Inventor： Andreas Bisplinghoff ,  Stefan Langenbach ,  Norbert Beck

    IPC: H03M13/37 ,  H03M13/45 ,  H03M13/25 ,  H03M13/11 ,  H03M13/00

    CPC classification number: H03M13/3746 ,  H03M13/1102 ,  H03M13/1111 ,  H03M13/258 ,  H03M13/2957 ,  H03M13/336 ,  H03M13/3715 ,  H03M13/3784 ,  H03M13/45 ,  H03M13/458 ,  H03M13/616 ,  H03M13/6325 ,  H03M13/6337 ,  H04L1/0045

    Abstract: A forward error correction and differentially encoded signal obtained via a communication channel is supplied to a soft-input soft-output (SISO) differential decoder that is bi-directionally coupled to a SISO forward error correction decoder. Over a first portion of a plurality of decoding iterations of the differentially encoded signal, the SISO differential decoder and the SISO forward error correction decoder are operated in a turbo decoding mode in which decoded messages generated by the SISO differential decoder are supplied to the SISO forward error correction decoder and forward error correction messages are supplied to the differential decoder. Over a second portion of the plurality of decoding iterations of the differentially encoded signal, the SISO forward error correction decoder is operated in a non-turbo decoding mode without any messages passing to and from the SISO differential decoder. Decoder output is obtained from the SISO forward error correction decoder.

    Abstract translation: 经由通信信道获得的前向纠错和差分编码信号被提供给双向耦合到SISO前向纠错解码器的软输入软输出（SISO）差分解码器。 在差分编码信号的多个解码迭代的第一部分中，SISO差分解码器和SISO前向纠错解码器以turbo解码模式操作，其中由SISO差分解码器产生的解码信息被提供给SISO前向 纠错解码器和前向纠错消息被提供给差分解码器。 在差分编码信号的多个解码迭代的第二部分上，SISO前向纠错解码器以非turbo解码模式操作，而没有任何消息传送到SISO差分解码器。 解码器输出从SISO前向纠错解码器获得。

    Method, apparatus and system for error control
    3.
    发明授权
    Method, apparatus and system for error control 有权

    公开(公告)号：US10887052B2

    公开(公告)日：2021-01-05

    申请号：US16663833

    申请日：2019-10-25

    Applicant: Cisco Technology, Inc.

    Inventor： Gilberto Loprieno ,  Stefan Langenbach

    IPC: H04B10/69 ,  H04L1/00 ,  H04B10/50 ,  H04B10/66

    Abstract: A first device receives, over a first communications link, a container frame having a payload of a first length. The payload of the container frame includes multiple optical transport unit (OTU) frames of a second length. The first length is not a multiple of the second length. Each of the OTU frames includes an optical data unit (ODU) frame, a sequence of forward error correction (FEC) bits for the ODU frame, and a sequence of error-identifying bits for the ODU frame. The first device determines, based on the sequences of error-identifying bits, a performance of the first communications link.

    APPARATUS AND METHOD FOR AVOIDING DETERMINISTIC BLANKING OF SECURE TRAFFIC
    4.
    发明申请
    APPARATUS AND METHOD FOR AVOIDING DETERMINISTIC BLANKING OF SECURE TRAFFIC 审中-公开

    公开(公告)号：US20200067660A1

    公开(公告)日：2020-02-27

    申请号：US16667958

    申请日：2019-10-30

    Applicant: Cisco Technology, Inc.

    Inventor： Stefan Langenbach ,  Gilberto Loprieno ,  Alessandro Cavaciuti

    IPC: H04L1/20 ,  H04L29/06 ,  H04L1/00

    Abstract: In one embodiment an apparatus, method, and system is described, the embodiment an apparatus, method including receiving a stream of data frames at an input interface, the data frames one of including security frames, or being included in security frames, wherein the security frames include payload data, performing forward error correction on the data frames a forward error correction (FEC) decoder, buffering received data frames at a buffer and blanker engine and building a complete security frame of the received data frames, determining whether or not to suppress taking a consequent action based on a frequency of authentication errors at an authentication engine, wherein the consequent action to be taken or suppressed, when taken, is taken upon payload data of one or more security frames including a data frame upon which an authentication error occurred. Related apparatus, methods and systems are also described.

    Method for Obtaining a Set of Path Metrics and Equalizer for a Receiver for Digital Data
    6.
    发明申请
    Method for Obtaining a Set of Path Metrics and Equalizer for a Receiver for Digital Data 有权
    用于获取用于数字数据的接收机的路径度量和均衡器的集合的方法

    公开(公告)号：US20130124948A1

    公开(公告)日：2013-05-16

    申请号：US13733372

    申请日：2013-01-03

    Applicant: Cisco Technology, Inc.

    Inventor： Nebojsa Stojanovic ,  Stefan Langenbach

    IPC: H03M13/03

    CPC classification number: H03M13/03 ,  H04L25/03184 ,  H04L25/03191

    Abstract: This invention relates to methods for obtaining a bin number of path metrics. When performing such methods, a histogram is provided, which composes a bin number of values, a maximum value and a tail region left or right of the maximum value. A bin number of path metrics is obtained from said values. According to an embodiment a local extremum is removed from said tail region. According to another embodiment the tail region is forced to be convex. According to a further embodiment a maximum metric difference between neighboring metrics is ensured.

    Abstract translation: 本发明涉及获得路数量度的箱数的方法。 当执行这样的方法时，提供直方图，其构成最大值的左边或右边的值的二进制数，最大值和尾部区域。 从所述值获得二进制数的路径度量。 根据实施例，从所述尾部区域移除局部极值。 根据另一个实施例，尾部区域被迫凸起。 根据另一实施例，确保相邻度量之间的最大度量差异。

    Apparatus and method for avoiding deterministic blanking of secure traffic
    7.
    发明授权
    Apparatus and method for avoiding deterministic blanking of secure traffic 有权

    公开(公告)号：US11005609B2

    公开(公告)日：2021-05-11

    申请号：US16667958

    申请日：2019-10-30

    Applicant: Cisco Technology, Inc.

    Inventor： Stefan Langenbach ,  Gilberto Loprieno ,  Alessandro Cavaciuti

    IPC: H04L1/20 ,  H04L29/06 ,  H04L1/00

    Abstract: In one embodiment an apparatus, method, and system is described, the embodiment an apparatus, method including receiving a stream of data frames at an input interface, the data frames one of including security frames, or being included in security frames, wherein the security frames include payload data, performing forward error correction on the data frames a forward error correction (FEC) decoder, buffering received data frames at a buffer and blanker engine and building a complete security frame of the received data frames, determining whether or not to suppress taking a consequent action based on a frequency of authentication errors at an authentication engine, wherein the consequent action to be taken or suppressed, when taken, is taken upon payload data of one or more security frames including a data frame upon which an authentication error occurred. Related apparatus, methods and systems are also described.

    METHOD, APPARATUS AND SYSTEM FOR ERROR CONTROL
    8.
    发明申请
    METHOD, APPARATUS AND SYSTEM FOR ERROR CONTROL 有权

    公开(公告)号：US20210075543A1

    公开(公告)日：2021-03-11

    申请号：US17101083

    申请日：2020-11-23

    Applicant: Cisco Technology, Inc.

    Inventor： Gilberto Loprieno ,  Stefan Langenbach

    IPC: H04L1/00 ,  H04B10/50 ,  H04B10/66

    Abstract: A first device receives a first container frame having a payload of a first length. The payload of the container frame includes multiple optical transport unit (OTU) frames, each of which includes an optical data unit (ODU) frame and a sequence of forward error correction (FEC) bits for the ODU frame. Each OTU frame is associated with a first sequence of error-identifying bits. The first device determines, for each OTU frame, a second sequence of error-identifying bits, and forms a second container frame including the OTU frames, the first sequences of error-identifying bits, and the second sequences of error-identifying bits. The first device transmits the second container frame to a second device.

    Accurate and Fast In-Service Estimation of Input Bit Error Ratio of Low Density Parity Check Decoders
    10.
    发明申请
    Accurate and Fast In-Service Estimation of Input Bit Error Ratio of Low Density Parity Check Decoders 审中-公开
    低密度奇偶校验解码器的输入误码率的准确和快速的在线估计

    公开(公告)号：US20150363247A1

    公开(公告)日：2015-12-17

    申请号：US14304147

    申请日：2014-06-13

    Applicant: Cisco Technology, Inc.

    Inventor： Andreas Bisplinghoff ,  Stefan Langenbach

    IPC: G06F11/07 ,  H03M13/11

    CPC classification number: G06F11/076 ,  H03M13/1105 ,  H03M13/612

    Abstract: A device receives signals over a communication medium and uses a low density parity check decoder to decode data in the signals. A number of unsatisfied parity checks are counted prior to a first decoding iteration of the low density parity check decoder on a basis of log likelihood ratios computed from the signals. An operational characteristic of the low density parity check decoder is computed based on an accumulated number of unsatisfied parity checks.

    Abstract translation: 设备通过通信介质接收信号，并使用低密度奇偶校验解码器对信号中的数据进行解码。 基于从信号计算的对数似然比，在低密度奇偶校验解码器的第一解码迭代之前计数多个不满足的奇偶校验。 低密度奇偶校验解码器的操作特性基于不满足奇偶校验的累计数量来计算。

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