公开(公告)号：US20150212386A1

公开(公告)日：2015-07-30

申请号：US14266397

申请日：2014-04-30

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar PATEL ,  Prakash GOTHOSKAR

IPC: G02F1/225

CPC classification number: G02F1/025 ,  G02B6/132 ,  G02B6/136 ,  G02F1/011 ,  G02F1/2257 ,  G02F2001/0152

Abstract: An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. As opposed to a horizontal SISCAP structure where the dielectric layer is disposed between upper and lower waveguides, arranging the dielectric layer between waveguides disposed on the same plane results in a vertical SISCAP structure. In one embodiment, the leftmost and rightmost waveguide are both made from crystalline silicon.

Abstract translation: 光调制器可以包括最左边的波导，最右边的波导和介于它们之间的电介质层。 在一个实施例中，波导可以设置在同一平面上。 当在最右侧和最左侧的波导之间产生电压电位时，这些层形成硅 - 绝缘体 - 硅电容器（也称为SISCAP）结构，其提供通过调制器的光信号的有效的高速光调制。 与水平SISCAP结构相反，其中介电层设置在上和下波导之间，将介质层布置在同一平面上的波导之间，导致垂直SISCAP结构。 在一个实施例中，最左侧和最右侧的波导均由晶体硅制成。

公开(公告)号：US20160050019A1

公开(公告)日：2016-02-18

申请号：US14462239

申请日：2014-08-18

Applicant: Cisco Technology, Inc.

Inventor： Prakash GOTHOSKAR ,  Vipulkumar PATEL ,  Kalpendu SHASTRI ,  Rao V. YELAMARTY

IPC: H04B10/40

CPC classification number: H04B10/40 ,  G02B6/4215 ,  G02B6/423 ,  G02B6/4244 ,  G02B6/4249

Abstract: Embodiments described herein describe a sub-mount that is etched to include respective cavities with at least two adjacent sides that align optical filters and a mirror. Moreover, the cavities are arranged on the sub-mount such that when the filters and mirror are disposed in the cavities, they align in a manner that enables the performance of a multiplexing or demultiplexing function as part of, for example, a zigzag multiplexer/demultiplexer. In one embodiment, the filters and mirrors are aligned passively rather than actively. The sub-mount may then be placed on a substrate that includes other components of a ROSA or TOSA. In one embodiment, the substrate is also etched to include a cavity two adjacent sides to align the sub-mount so that sub-mount is passively aligned once disposed into the cavity.

Abstract translation: 本文所述的实施例描述了一种子座，其被蚀刻以包括具有对准光学滤光器和反射镜的至少两个相邻侧的相应空腔。 此外，空腔被布置在子安装座上，使得当滤光器和反射镜设置在空腔中时，它们以使得能够执行复用或解复用功能作为例如锯齿形复用器/ 解复用器 在一个实施例中，滤波器和反射镜被动地而不是主动对准。 然后可以将该子安装件放置在包括ROSA或TOSA的其它部件的基板上。 在一个实施例中，衬底也被蚀刻以包括两个相邻侧面的空腔以对准子安装座，使得一旦设置在空腔中，子安装座被动地对准。

公开(公告)号：US20140362457A1

公开(公告)日：2014-12-11

申请号：US14331315

申请日：2014-07-15

Applicant: Cisco Technology, Inc.

Inventor： Mary NADEAU ,  Vipulkumar PATEL ,  Prakash GOTHOSKAR ,  John FANGMAN ,  John Matthew FANGMAN ,  Mark WEBSTER

IPC: G02B7/02 ,  G02B7/00 ,  H01L23/544

CPC classification number: G02B7/025 ,  G02B6/4228 ,  G02B6/4239 ,  G02B7/003 ,  H01L23/345 ,  H01L23/544 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2223/54426 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/83121 ,  H01L2224/83143 ,  H01L2224/83192 ,  H01L2224/83234 ,  H01L2224/83385 ,  H01L2224/83862 ,  H01L2924/14 ,  Y10T428/24479 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and “shape” of an adhesive “dot” so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (“channels”) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.

Abstract translation: 用于改善组件中微组件的粘合附着的装置利用形成在用于支撑微组件的衬底顶表面中的多个平行布置的槽。 这些槽用于控制粘合剂“点”的流动和“形状”，以便将微组件快速且精确地附着在基板的表面上。 在衬底的表面中形成（优选地，蚀刻）狭槽，使其自身具有从一个衬底到另一个衬底的可再现精度。 其它槽（“通道”）可以与结合槽结合形成，使得外来粘合剂材料将流入这些通道并且不会扩散到不需要的区域。

公开(公告)号：US20160170240A1

公开(公告)日：2016-06-16

申请号：US14248081

申请日：2014-04-08

Applicant: CISCO TECHNOLOGY , INC.

Inventor： Donald ADAMS ,  Prakash GOTHOSKAR ,  Vipulkumar PATEL ,  Mark WEBSTER

IPC: G02F1/025

CPC classification number: G02F1/025 ,  G02B6/132 ,  G02B6/136 ,  G02F1/011 ,  G02F1/2257 ,  G02F2001/0152

Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.

Abstract translation: 光调制器可以包括下波导，上波导和介于其间的电介质层。 当在下波导和上波导之间产生电压电位时，这些层形成硅 - 绝缘体 - 硅电容器（也称为SISCAP）引导件，其提供通过调制器的光信号的有效的高速光调制。 在一个实施例中，至少一个波导包括在电荷调制区域处对准的相应的脊部分，其可以有助于限制光学调制器中的光学模式（例如，在宽度方向上）。 在另一个实施例中，脊部可以形成在下波导和上波导两者上。 这些脊部可以在垂直方向（例如，厚度方向）上对准，使得脊重叠，这可以通过使电荷调制区域中的光学模式居中来进一步提高光学效率。

公开(公告)号：US20150212344A1

公开(公告)日：2015-07-30

申请号：US14263389

申请日：2014-04-28

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar PATEL ,  Prakash GOTHOSKAR ,  Sean ANDERSON

IPC: G02F1/01 ,  G02F1/00

CPC classification number: G02F1/025 ,  G02B6/132 ,  G02B6/136 ,  G02F1/011 ,  G02F1/2257 ,  G02F2001/0152

Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. In one embodiment, the lower waveguide may include a u-shaped region within an optical mode of the light passing through the optical modulator. By conforming the dielectric layer to the surfaces of the u-shaped region, the amount of area of the dielectric layer within a charge modulation region is increased relative to forming the dielectric layer on a single plane. Folding the dielectric layer in this manner may improve modulation efficiency. In one embodiment, the u-shaped region is formed by using ridge structures that extend from an upper surface of the lower waveguide towards the upper waveguide. To aid in lateral confinement of the optical mode, the dielectric layer may be deposited on one side surface of the ridge structures while a different dielectric material is deposited on the opposite side surface.

Abstract translation: 光调制器可以包括下波导，上波导和介于其间的电介质层。 在一个实施例中，下波导可以包括通过光调制器的光的光学模式内的u形区域。 通过使介电层与U形区域的表面相一致，相对于在单个平面上形成电介质层，电荷调制区域内的电介质层的面积增加。 以这种方式折叠介电层可以提高调制效率。 在一个实施例中，通过使用从下波导的上表面向上波导延伸的脊结构形成U形区域。 为了有助于光学模式的横向限制，介电层可以沉积在脊结构的一个侧表面上，而不同的电介质材料沉积在相对的侧表面上。

公开(公告)号：US20160147087A1

公开(公告)日：2016-05-26

申请号：US15009483

申请日：2016-01-28

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar PATEL ,  Prakash GOTHOSKAR

IPC: G02F1/025 ,  G02B6/132 ,  G02F1/225 ,  G02B6/136

CPC classification number: G02F1/025 ,  G02B6/132 ,  G02B6/136 ,  G02F1/011 ,  G02F1/2257 ,  G02F2001/0152

Abstract: An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. As opposed to a horizontal SISCAP structure where the dielectric layer is disposed between upper and lower waveguides, arranging the dielectric layer between waveguides disposed on the same plane results in a vertical SISCAP structure. In one embodiment, the leftmost and rightmost waveguide are both made from crystalline silicon.

公开(公告)号：US20140248723A1

公开(公告)日：2014-09-04

申请号：US14276566

申请日：2014-05-13

Applicant: Cisco Technology, Inc.

Inventor： Kalpendu SHASTRI ,  Vipulkumar PATEL ,  Mark WEBSTER ,  Prakash GOTHOSKAR ,  Ravinder KACHRU ,  Soham PATHAK ,  Rao V. YELAMARTY ,  Thomas DAUGHERTY ,  Bipin DAMA ,  Kaushik PATEL ,  Kishor DESAI

IPC: H01L25/00 ,  H01L25/16

CPC classification number: H01L25/50 ,  G02B6/423 ,  G02B6/4244 ,  G02B6/4245 ,  G02B6/4249 ,  G02B6/4257 ,  G02B6/426 ,  H01L25/167 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.

Abstract translation: 光电子收发器组件过程的晶片级实现利用硅晶片作为光学参考平面和平台，同时为多个单独的收发器模块组装所有必需的光学和电子部件。 特别地，硅晶片被用作“平台”（插入器），在其上安装或集成多个收发器模块的所有组件，硅插入器的顶表面用作参考平面，用于定义 分离光学元件之间的光信号路径。 实际上，通过使用单个硅晶片作为大量单独的收发器模块的平台，可以使用晶片尺度组装过程以及这些模块的光学对准和测试。