公开(公告)号：US20080224752A1

公开(公告)日：2008-09-18

申请号：US12045125

申请日：2008-03-10

Applicant: Chul-Ho LEE ,  Jin-Yub LEE

Inventor： Chul-Ho LEE ,  Jin-Yub LEE

IPC: G06F1/04

CPC classification number: G06F1/3203 ,  G06F1/324 ,  G06F1/3275 ,  Y02D10/126 ,  Y02D10/14

Abstract: An internal clock generator, system and method of generating the internal clock are disclosed. The method comprises detecting the level of an operating voltage within the system, comparing the level of the operating voltage to a target voltage level and generating a corresponding detection signal, and selecting between a normal clock and an alternate clock having a period longer than the period of the normal clock in relation to the detection signal and generating an internal clock on the basis of the selection.

Abstract translation: 公开了一种产生内部时钟的内部时钟发生器，系统和方法。 该方法包括检测系统内的工作电压的电平，将工作电压的电平与目标电压电平进行比较，并产生相应的检测信号，以及选择正常时钟和具有比周期长的周期的备用时钟 的相对于检测信号的正常时钟，并且基于该选择产生内部时钟。

公开(公告)号：US20140186777A1

公开(公告)日：2014-07-03

申请号：US14083598

申请日：2013-11-19

Applicant: Sung-Jae LEE ,  Hwan-Sung CHEON ,  Youn-Jin CHO ,  Chul-Ho LEE ,  Chung-Heon LEE

Inventor： Sung-Jae LEE ,  Hwan-Sung CHEON ,  Youn-Jin CHO ,  Chul-Ho LEE ,  Chung-Heon LEE

IPC: C07C33/26 ,  G03F7/20 ,  C07C43/23 ,  G03F1/50

CPC classification number: C07C33/26 ,  C07C43/23 ,  G03F7/0752 ,  G03F7/09 ,  G03F7/40

Abstract: A monomer for a hardmask composition represented by the following Chemical Formula 1,

Abstract translation: 用于由以下化学式1表示的硬掩模组合物的单体，

公开(公告)号：US20140175669A1

公开(公告)日：2014-06-26

申请号：US14072881

申请日：2013-11-06

Applicant: Joon-Young MOON ,  Youn-Jin CHO ,  Sung-Jae LEE ,  You-Jung PARK ,  Yong-Woon YOON ,  Chul-Ho LEE ,  Chung-Heon LEE

Inventor： Joon-Young MOON ,  Youn-Jin CHO ,  Sung-Jae LEE ,  You-Jung PARK ,  Yong-Woon YOON ,  Chul-Ho LEE ,  Chung-Heon LEE

IPC: H01L21/768 ,  H01L23/535

CPC classification number: H01L21/76804 ,  H01L21/76808 ,  H01L23/5226 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Forming a dual damascene structure includes forming a first insulation layer and a second insulation layer, forming a resist mask, forming a via hole down to a lower end of the first insulation layer, forming a hardmask layer in the via hole and on the second insulation layer using a spin-coating method, forming a resist mask, forming a first trench hole down to a lower end of the second insulation layer, respectively removing a part of the hardmask layer in the via hole and a part of the hardmask layer on the second insulation layer, forming a second trench hole by removing a part of the first insulation layer between a top corner of the hardmask layer remaining in the via hole and a bottom corner of the first trench hole, removing the hardmask layer, and filling the via hole and the second trench hole with a conductive material.

Abstract translation: 形成双镶嵌结构包括形成第一绝缘层和第二绝缘层，形成抗蚀剂掩模，在第一绝缘层的下端形成通孔，在通孔中和第二绝缘层上形成硬掩模层 层，形成抗蚀剂掩模，在第二绝缘层的下端形成第一沟槽，分别去除通孔中的硬掩模层的一部分和硬掩模层的一部分， 第二绝缘层，通过去除残留在通孔中的硬掩模层的顶角之间的第一绝缘层的一部分和第一沟槽的底角，形成第二沟槽，去除硬掩模层，并且填充通孔 孔和具有导电材料的第二沟槽孔。