摘要:
A multicarrier transceiver is disclosed that includes a digital signal processor with a plurality of memory locations, a direct memory, an encoder module coupled to receive data from the FIFO buffers, a decoder module coupled to receive data from the FIFO buffers, a Fourier transform module configured to perform an inverse Fast Fourier transform for transmit operations and to perform Fast Fourier transform (FFT) operations for receive operations, a plurality of distributed modules including the encoder module, the decoder module and the Fourier transform module, each module configured with a memory port, each memory port coupled to a peripheral bus and the DMA bus, a plurality of memory ports coupled to each of the distributed modules, the plurality of memory ports coupled to a peripheral bus, and a plurality of point-to-point buses coupled to each of the distributed modules, the point-to-point bus configured to enable data flow and testing and provide a bypass capability for each of the distributed modules.
摘要:
A method for storage for complex numbers that employs a shared exponent field is disclosed. Rather than each floating point component of an complex number having its own distinct signed mantissa and exponent fields, each component includes a distinct signed mantissa field and shares an exponent field, thereby increasing the possible size of each distinct signed mantissa field by as much as one half the number of bits formerly employed to store a single distinct exponent field.
摘要:
A method for storage for complex numbers that employs a shared exponent field is disclosed. Rather than each floating point component of an complex number having its own distinct signed mantissa and exponent fields, each component includes a distinct signed mantissa field and shares an exponent field, thereby increasing the possible size of each distinct signed mantissa field by as much as one half the number of bits formerly employed to store a single distinct exponent field.
摘要:
A method for storage for complex numbers that employs a shared exponent field is disclosed. Rather than each floating point component of an complex number having its own distinct signed mantissa and exponent fields, each component includes a distinct signed mantissa field and shares an exponent field, thereby increasing the possible size of each distinct signed mantissa field by as much as one half the number of bits formerly employed to store a single distinct exponent field.
摘要:
The framer, also referred to as the scrambler/Reed-Solomon encoder (SRS), is a part of the transmitter and accepts user and control data in the form of one or more logical channels, partitions this data into frames, adds error correction codes, randomizes the data through a scrambler, and multiplexes logical channels into a single data stream. The multiplexed data is then passed to the constellation encoder as the next step in the formation of the VDSL symbol. The deframer, also referred as the descrambler/Reed-Solomon decoder (DRS), is part of the receiver and performs the inverse function of the framer. Disclosed is a highly configurable hardware framer/deframer that includes a digital signal processor interface configured to provide high level control, a FIFO coupled to data interfaces, a scrambler and CRC generator, a Reed-Solomon encoder, an interleaver, a data interface coupled to a constellation encoder, a data interface coupled to a constellation decoder, a deinterleaver, a Reed-Solomon decoder, descrambler and CRC check, an interface to external data sync, methods for control of configuration of data paths between hardware blocks, and methods for control and configuration of the individual hardware blocks in a manner that provides compliance with VDSL and many related standards.
摘要:
The framer, also referred to as the scrambler/Reed-Solomon encoder (SRS), is a part of the transmitter and accepts user and control data in the form of one or more logical channels, partitions this data into frames, adds error correction codes, randomizes the data through a scrambler, and multiplexes logical channels into a single data stream. The multiplexed data is then passed to the constellation encoder as the next step in the formation of the VDSL symbol. The deframer, also referred as the descrambler/Reed-Solomon decoder (DRS), is part of the receiver and performs the inverse function of the framer. Disclosed is a highly configurable hardware framer/deframer that includes a digital signal processor interface configured to provide high level control, a FIFO coupled to data interfaces, a scrambler and CRC generator, a Reed-Solomon encoder, an interleaver, a data interface coupled to a constellation encoder, a data interface coupled to a constellation decoder, a deinterleaver, a Reed-Solomon decoder, descrambler and CRC check, an interface to external data sync, methods for control of configuration of data paths between hardware blocks, and methods for control and configuration of the individual hardware blocks in a manner that provides compliance with VDSL and many related standards.
摘要:
A full-duplex modem having improved transmission speeds over voice grade telephone circuits that extends the concepts of asymmetric transmission to include echo cancellation techniques. The preferred modem has a high speed forward channel and an overlapping low speed back channel and is capable of transmitting or receiving over either of the channels, depending on the relative data rates. A narrow band echo canceler substantially cancels all or part of reflected transmit signals. Because the echo cancellation technique employed is narrow band, there is a significant reduction in the complexity and computational requirements for the modem.
摘要:
The framer, also referred to as the scrambler/Reed-Solomon encoder (SRS), is a part of the transmitter and accepts user and control data in the form of one or more logical channels, partitions this data into frames, adds error correction codes, randomizes the data through a scrambler, and multiplexes logical channels into a single data stream. The multiplexed data is then passed to the constellation encoder as the next step in the formation of the VDSL symbol. The deframer, also referred as the descrambler/Reed-Solomon decoder (DRS), is part of the receiver and performs the inverse function of the framer. Disclosed is a highly configurable hardware framer/deframer that includes a digital signal processor interface configured to provide high level control, a FIFO coupled to data interfaces, a scrambler and CRC generator, a Reed-Solomon encoder, an interleaver, a data interface coupled to a constellation encoder, a data interface coupled to a constellation decoder, a deinterleaver, a Reed-Solomon decoder, descrambler and CRC check, an interface to external data sync, methods for control of configuration of data paths between hardware blocks, and methods for control and configuration of the individual hardware blocks in a manner that provides compliance with VDSL and many related standards.
摘要:
A method for accumulating component video signals non-additively adds the luminance components to produce an accumulated luminance component, and additively adds the chrominance components to produce an accumulated chrominance component. The accumulated chrominance component may be clipped to limit chrominance values in an overlap area to legal color values. The intentional overlap of the component video signals produces an accumulation special effect in the overlap area.
摘要:
Apparatus and method for enabling bilateral transmission of digital data between a local area network and telephone company networks employing both analog and digital telephone lines. A modem modulates signals responsive to signals from a local area network representing an outgoing call to form digital telephone signals suitable for transmission by a telephone line and suitable for demodulation by receiving analog modems. A circuit switched time division multiplex bus transmits the digital telephone signals to the telephone line. The modem also demodulates incoming digital telephone signals to form digital network bus signals divided into packets. A packet bus transmits the digital network bus signals to a network interface which processes the signals and transmits them to the local area network.