Abstract:
Embodiments for video content source resolution detection are provided. Embodiments enable systems and methods that measure video content source resolution and that provide image-by-image source scale factor measurements to picture quality (PQ) processing modules. With the source scale factor information, PQ processing modules can be adapted dynamically (on a picture-by-picture basis) according to the source scale factor information for better picture quality enhancement. In addition, embodiments provide source resolution detection that is minimally affected by video coding artifacts and superimposed content (e.g., graphics).
Abstract:
A method and system for efficiently organizing data in memory is provided. Exemplary aspects of the invention may include storing linear data and block data in more than one DRAM device and accessing the data with one read/write access cycle. Common control signals may be used to control the DRAM devices and the address lines used to address each DRAM device may be independent from one another. The data read from the DRAM devices may be reordered to make the data more suitable for processing by applications.
Abstract:
In some aspects, the disclosure is directed to methods and systems for encoding and sharing media clips via a social networking provider responsive to a user interaction via a single “like” or “share” button. Media may be constantly buffered as the user watches the program, such that the user need not initiate recording, enabling the user to quickly share amusing or media clips as they happen live. The device may decode, scale or subsample, and compress or re-encode the media to take up less space in a buffer of the device and/or to comply with copyright fair use requirements. Responsive to the user interaction or “share” command, the device may transfer the contents of the buffer to a social media service along with instructions to generate a post to the social network identifying the user, media, and/or buffer contents.
Abstract:
Systems and methods are disclosed for video processing modules. More specifically a network is disclosed for processing data. The network comprises a register DMA controller adapted to support register access and at least one node adapted to the data. At least one link communicates with the node, and is adapted to transmit data and at least one network module communicates with at least the link, and is adapted to route data to at least the link.
Abstract:
Systems and methods are disclosed for performing multiple processing of data in a network. In one embodiment, the network comprises a first display pipeline that is formed in real time from a plurality of possible display pipelines and that performs at least a first processing step on received data. A buffer stores the processed data and a second display pipeline that is formed in real time from a plurality of possible display pipelines performs at least a second processing step on stored data.
Abstract:
A streaming apparatus includes circuitry accommodated in a High-Definition Multimedia Interface (HDMI) connectable device to detect a connection state of a Universal Serial Bus (USB) supply to the streaming apparatus; set an operational mode to a HDMI mode or a Mobile High Definition Link (MHL) mode based on the connection state of the USB supply to the streaming apparatus. The apparatus selects a supply power from the USB power supply or the MHL power supply based on the connection state of the USB supply to the apparatus.
Abstract:
Systems and methods that provide graphics using a graphical engine are provided. One such system includes at least one graphical pipeline and a graphical engine. The at least one graphical pipeline is coupled to a bus and operable to generate a plurality of graphical layers. The graphical engine is coupled to the bus and operable to receive, over the bus, the plurality of graphical layers. The graphical engine is operable to composite the received plurality of graphical layers into a composite graphical layer, and to store the composite graphical layer in a local memory of the graphical engine.
Abstract:
Systems and methods are disclosed for video processing modules. More specifically a network is disclosed for processing data. The network comprises a register DMA controller adapted to support register access and at least one node adapted to the data. At least one link communicates with the node, and is adapted to transmit data and at least one network module communicates with at least the link, and is adapted to route data to at least the link.
Abstract:
A method and system are provided in which a video processor may select a 2D video output format or a 3D video output format. The video processor may generate composited video data by combining video data from a video source, and one or both of video data from additional video sources and graphics data from graphics source(s). The video processor may select the order in which such combination is to occur. The video data from the various video sources may comprise one or both of 2D video data and 3D video data. The graphics data from the graphics sources may comprise one or both of 2D graphics data and 3D graphics data. The video processor may perform 2D-to-3D and/or 3D-to-2D format conversion when appropriate to generate the composited video data in accordance with the selected output video format.
Abstract:
Systems and methods are disclosed for performing multiple processing of data in a network. In one embodiment, the network comprises a first display pipeline that is formed in real time from a plurality of possible display pipelines and that performs at least a first processing step on received data. A buffer stores the processed data and a second display pipeline that is formed in real time from a plurality of possible display pipelines performs at least a second processing step on stored data.