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公开(公告)号：US20130138842A1
公开(公告)日：2013-05-30
申请号：US13745910
申请日：2013-01-21
Applicant: BROADCOM CORPORATION
Inventor： Patrick Law , Darren Neuman , David Baer
IPC: G06F13/28
CPC classification number: G06F13/28 , H04N21/426
Abstract: Systems and methods are disclosed for performing multiple processing of data in a network. In one embodiment, the network comprises a first display pipeline that is formed in real time from a plurality of possible display pipelines and that performs at least a first processing step on received data. A buffer stores the processed data and a second display pipeline that is formed in real time from a plurality of possible display pipelines performs at least a second processing step on stored data.
Abstract translation: 公开了用于在网络中执行数据的多个处理的系统和方法。 在一个实施例中，网络包括从多个可能的显示管道实时形成并且对接收到的数据执行至少第一处理步骤的第一显示管道。 缓冲器存储经处理的数据，并且从多个可能的显示管道实时形成的第二显示管道对存储的数据执行至少第二处理步骤。
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公开(公告)号：US08736621B2
公开(公告)日：2014-05-27
申请号：US14076813
申请日：2013-11-11
Applicant: Broadcom Corporation
Inventor： Patrick Law , Darren Neuman , David Baer
CPC classification number: G06T1/20 , H04N21/426 , H04N21/43615 , H04N21/4622 , H04N21/6338 , H04N21/6371
Abstract: Systems and methods are disclosed for video processing modules. More specifically a network is disclosed for processing data. The network comprises a register DMA controller adapted to support register access and at least one node adapted to the data. At least one link communicates with the node, and is adapted to transmit data and at least one network module communicates with at least the link, and is adapted to route data to at least the link.
Abstract translation: 公开了用于视频处理模块的系统和方法。 更具体地，公开了一种用于处理数据的网络。 网络包括适于支持寄存器访问的寄存器DMA控制器和适于数据的至少一个节点。 至少一个链路与节点通信，并且适于传输数据，并且至少一个网络模块至少与链路通信，并且适于将数据路由到至少链路。
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公开(公告)号：US08681161B2
公开(公告)日：2014-03-25
申请号：US13745910
申请日：2013-01-21
Applicant: Broadcom Corporation
Inventor： Patrick Law , Darren Neuman , David Baer
CPC classification number: G06F13/28 , H04N21/426
Abstract: Systems and methods are disclosed for performing multiple processing of data in a network. In one embodiment, the network comprises a first display pipeline that is formed in real time from a plurality of possible display pipelines and that performs at least a first processing step on received data. A buffer stores the processed data and a second display pipeline that is formed in real time from a plurality of possible display pipelines performs at least a second processing step on stored data.
Abstract translation: 公开了用于在网络中执行数据的多个处理的系统和方法。 在一个实施例中，网络包括从多个可能的显示管道实时形成并且对接收到的数据执行至少第一处理步骤的第一显示管道。 缓冲器存储经处理的数据，并且从多个可能的显示管道实时形成的第二显示管道对存储的数据执行至少第二处理步骤。
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公开(公告)号：US20140078158A1
公开(公告)日：2014-03-20
申请号：US14076813
申请日：2013-11-11
Applicant: Broadcom Corporation
Inventor： Patrick Law , Darren Neuman , David Baer
IPC: G06T1/20
CPC classification number: G06T1/20 , H04N21/426 , H04N21/43615 , H04N21/4622 , H04N21/6338 , H04N21/6371
Abstract: Systems and methods are disclosed for video processing modules. More specifically a network is disclosed for processing data. The network comprises a register DMA controller adapted to support register access and at least one node adapted to the data. At least one link communicates with the node, and is adapted to transmit data and at least one network module communicates with at least the link, and is adapted to route data to at least the link.
Abstract translation: 公开了用于视频处理模块的系统和方法。 更具体地，公开了一种用于处理数据的网络。 网络包括适于支持寄存器访问的寄存器DMA控制器和适于数据的至少一个节点。 至少一个链路与节点通信，并且适于传输数据，并且至少一个网络模块至少与链路通信，并且适于将数据路由到至少链路。
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