公开(公告)号：US20170236705A1

公开(公告)日：2017-08-17

申请号：US15518642

申请日：2016-01-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Dong LI ,  Xiaoyong LU ,  Xiaolong LI ,  Zheng LIU ,  Shuai ZHANG ,  Yucheng CHAN ,  Chienhung LIU ,  Chunping LONG

IPC: H01L21/02 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L21/0268 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02592 ,  H01L27/1222 ,  H01L27/1285 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78675 ,  H01L29/78696

Abstract: The present application provides a low temperature poly-silicon thin film, a low temperature poly-silicon thin film transistor and manufacturing methods thereof, and a display device. The manufacturing method of a low temperature poly-silicon thin film comprises steps of: forming an amorphous silicon thin film on a base; and performing a laser annealing process on the amorphous silicon thin film by using a mask plate to form a low temperature poly-silicon thin film, wherein the mask plate includes a transmissive region and a shielding region surrounding the transmissive region, and two sides of the shielding region adjacent to the transmissive region are in concave-convex shapes. Performance of the low temperature poly-silicon thin film formed by the manufacturing method of a low temperature poly-silicon thin film in the present application is enhanced.

公开(公告)号：US20160315197A1

公开(公告)日：2016-10-27

申请号：US15075439

申请日：2016-03-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chienhung LIU ,  Yucheng CHAN

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/78678 ,  H01L27/1274 ,  H01L29/78675

Abstract: The present invention discloses a thin-film transistor, a preparation method thereof, an array substrate comprising the thin-film transistor, and a display device comprising the array substrate, wherein the preparation method of the thin-film transistor comprises: successively depositing an amorphous silicon thin film and a protective layer thin film on a base substrate; annealing the amorphous silicon thin film so as to transform the amorphous silicon thin film into a poly-silicon thin film; and performing a single patterning process on the poly-silicon thin film and the protective layer thin film to pattern the poly-silicon thin film into an active layer and pattern the protective layer thin film into a protective layer.

Abstract translation: 本发明公开了一种薄膜晶体管及其制备方法，包括薄膜晶体管的阵列基板和包括阵列基板的显示装置，其中薄膜晶体管的制备方法包括：依次沉积非晶态 硅薄膜和基底基板上的保护层薄膜; 对非晶硅薄膜进行退火以将非晶硅薄膜转变为多晶硅薄膜; 对多晶硅薄膜和保护层薄膜进行单一图案化处理，将多晶硅薄膜图案化成有源层，将保护层薄膜图案化成保护层。

公开(公告)号：US20210242033A1

公开(公告)日：2021-08-05

申请号：US16303959

申请日：2018-05-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Bin ZHANG ,  Chienhung LIU ,  Yucheng CHAN ,  Xuefei SUN ,  Tingting ZHOU

IPC: H01L21/324 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/02 ,  H01L29/786

Abstract: A gate electrode and a method for manufacturing the same, and a method for manufacturing an array substrate are provided. The method for manufacturing a gate electrode may include: providing a substrate, wherein the substrate includes a gate electrode region and a non-gate electrode region; and forming a gate electrode layer on the substrate, wherein the gate electrode layer includes a conductive portion corresponding to the gate electrode region and a transparent portion corresponding to the non-gate electrode region. According to the gate electrode and the method for manufacturing the same, and the method for manufacturing an array substrate, step difference can be eliminated, thereby avoiding an influence of the step difference on the crystallization property of a polysilicon material when an Excimer Laser Annealing (ELA) process is performed on the amorphous silicon layer, and obtaining a better crystallization effect.

公开(公告)号：US20190027612A1

公开(公告)日：2019-01-24

申请号：US15534467

申请日：2016-11-25

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Huijuan ZHANG ,  Chienhung LIU

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/768 ,  H01L29/45 ,  H01L27/12

Abstract: The present disclosure provides a method for manufacturing a thin-film transistor and a thin-film transistor manufactured thereby, an array substrate and a display apparatus. The method comprises: forming a first layer; forming at least one etch stopper over the first layer; forming a second layer over the first layer and the at least one etch stopper; forming at least one contact via in the second layer, such that a bottom opening of each contact via contacts with a top surface of one etch stopper; and forming at least one electrode in the at least one contact via, such that each electrode extends in one contact via respectively, and is in contact with, and electrically coupled with, the one etch stopper. The at least one etch stopper comprises a composition. The composition is capable of blocking etching to the first layer during formation of the at least one contact via in the second layer; and the composition also has one of the following characteristics: an oxidization product of the composition is readily removable by a solution; an oxidization product is conductive; or the composition is resistant to oxidization.

公开(公告)号：US20160349622A1

公开(公告)日：2016-12-01

申请号：US15159197

申请日：2016-05-19

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shantao CHEN ,  Chienhung LIU

IPC: G03F7/20 ,  G02B3/00

CPC classification number: G02B3/0006 ,  G02B3/0037 ,  G03F7/70275

Abstract: The present invention discloses an exposure device including: a mask plate, on which a mask pattern is provided; and a first micro lens layer, provided at a light outputting side of the mask plate, wherein the first micro lens layer utilizes light that passes through the mask plate to form a reduced real image of the mask pattern, the real image is located at one side of the first micro lens layer, and the mask plate is located at other side of the first micro lens layer. In the present invention, by utilizing the characteristics of micro lenses, a reduced real image for the mask patter is formed and then projected onto the substrate to be exposed, which effectively increases precision and resolution of exposure and reduces equipment cost and development cost.

Abstract translation: 本发明公开了一种曝光装置，包括：掩模板，设置有掩模图案; 以及设置在所述掩模板的光出射侧的第一微透镜层，其中所述第一微透镜层利用穿过所述掩模板的光以形成所述掩模图案的减小的真实图像，所述真实图像位于一个 第一微透镜层的一侧，并且掩模板位于第一微透镜层的另一侧。 在本发明中，通过利用微透镜的特性，形成用于掩模图案的减小的实际图像，然后投影到待曝光的基板上，这有效地提高了曝光的精度和分辨率，并降低了设备成本和开发成本。

公开(公告)号：US20190094011A1

公开(公告)日：2019-03-28

申请号：US16041200

申请日：2018-07-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xuefei SUN ,  Chienhung LIU ,  Zhengliang LI ,  Bin ZHANG

IPC: G01B11/06

Abstract: The present disclosure provides a thickness measuring method and device. The thickness measuring method is used for measuring a thickness of a layer to be measured of a light-transmitting sample to be measured and comprising the steps of: placing the sample to be measured between an optical device and a metal layer, the optical device comprising a light incident surface and a light exit surface; adjusting incident light emitted to the light incident surface of the optical device so that an intensity of light exiting the light exit surface of the optical device is less than 10−12 W/m2, so as to obtain optical parameters of the incident light; and calculating a thickness of the layer to be measured according to the optical parameters of the incident light.

公开(公告)号：US20180374762A1

公开(公告)日：2018-12-27

申请号：US15736972

申请日：2017-06-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Bin ZHANG ,  Chienhung LIU ,  Yucheng CHAN ,  Xuefei SUN ,  Zhanfeng CAO

IPC: H01L21/84 ,  H01L27/12 ,  H01L27/146

Abstract: A method for fabricating an array substrate, an array substrate, and a display device are disclosed. The method includes forming a whole layer of opaque film on a substrate; treating the film to form a transparent region and an opaque region in the film, wherein the opaque region corresponds with a channel region of an active layer; and forming a thin film transistor on the film which has been treated. In the method, prior to forming the thin film transistor, the whole layer of opaque film is formed to comprise the transparent region and the opaque region. When other films are deposited on the whole layer of film, no difference in height occurs, and this further avoids various defects due to difference in height.

公开(公告)号：US20160329356A1

公开(公告)日：2016-11-10

申请号：US15085134

申请日：2016-03-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yucheng CHAN ,  Chienhung LIU

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L29/423

CPC classification number: H01L27/1248 ,  H01L21/02183 ,  H01L21/02244 ,  H01L27/1259 ,  H01L29/08 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66757 ,  H01L29/786 ,  H01L29/78606

Abstract: The present invention belongs to the field of display technology and provides a thin film transistor and a manufacturing method thereof, an array substrate and a display device. The thin film transistor comprises a gate, a source, a drain and a plurality of insulating layers, wherein at least one insulating layer comprises a Group VB metal oxide. Since the insulting layer is formed by using the Group VB metal oxide which has high dielectric constant, the thickness of the insulating layer can be reduced and the thin film transistor can be miniaturized.

Abstract translation: 本发明属于显示技术领域，提供了一种薄膜晶体管及其制造方法，阵列基板和显示装置。 薄膜晶体管包括栅极，源极，漏极和多个绝缘层，其中至少一个绝缘层包括VB族金属氧化物。 由于通过使用具有高介电常数的VB族金属氧化物形成绝缘层，所以可以减小绝缘层的厚度，并且可以使薄膜晶体管小型化。