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    Circuit employing charge storage diode in fast discharge mode
    2.
    发明授权
    Circuit employing charge storage diode in fast discharge mode 失效
    在快速放电模式下使用充电存储二极管的电路

    公开(公告)号：US3701907A

    公开(公告)日：1972-10-31

    申请号：US3701907D

    申请日：1970-10-23

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： WAABEN SIGURD G

    IPC: G11C27/00 ,  H03K5/20 ,  H03K17/74

    CPC classification number: G11C27/00

    Abstract: The output of a charge storage diode in its reverse conducting spike discharge mode utilized to impose a fixed supplemental charge on a capacitor in each of plural sample and hold circuits just after a signal sample charge has been placed in the capacitor. Isolating diodes couple a common signal source to the respective capacitors, and each diode is reversely biased by the total of the sample and supplemental charges in its holding capacitor to prevent crosstalk among the various holding capacitors. A memory drive circuit and a single sample and hold circuit are also shown to demonstrate the mentioned spike discharge mode of charge storage diode operation.

    Abstract translation: 在反向导通尖峰放电模式中的电荷存储二极管的输出用于在信号采样电荷已经放置在电容器中之后，在多个采样和保持电路中的每一个中的电容器上施加固定的补充电荷。 隔离二极管将公共信号源耦合到各个电容器，并且每个二极管被其保持电容器中的样本和补充电荷的总和反向偏置，以防止各个保持电容器之间的串扰。 还示出了存储器驱动电路和单个采样和保持电路以示出所述尖峰放电模式的电荷存储二极管操作。

    Selective switching matrix configuration having same inductance at each driving point
    3.
    发明授权
    Selective switching matrix configuration having same inductance at each driving point 失效
    选择性切换矩阵配置在每个驱动点具有相同的电感

    公开(公告)号：US3582893A

    公开(公告)日：1971-06-01

    申请号：US3582893D

    申请日：1968-11-29

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： WAABEN SIGURD G

    IPC: H03K17/76 ,  H04Q3/54 ,  H04Q3/00

    CPC classification number: H04Q3/54 ,  H03K17/76

    Abstract: The two sets of rail circuits of a selective switching matrix are arranged in parallel arrays extending colinearly in substantially the same plane. Their cross-point interconnecting circuits are each coupled between points of their respective rail circuits which are spaced from the driving points of such rail circuits by complementary distances totaling a predetermined magnitude which is the same for all of the interconnecting circuits. Such interconnecting circuits are also of equal extent so that equal circuit path lengths are included between any pair of driving points for said first and second sets of rail circuits. Particular matrix configurations utilizing integrated circuit techniques to advantage are also shown.

    Cross-point matrix memory using stored charge
    5.
    发明授权
    Cross-point matrix memory using stored charge 失效
    使用存储充电的交叉点矩阵存储器

    公开(公告)号：US3626389A

    公开(公告)日：1971-12-07

    申请号：US3626389D

    申请日：1969-10-08

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： WAABEN SIGURD G

    IPC: G11C11/41 ,  G11C11/36

    CPC classification number: G11C11/36

    Abstract: A cross-point matrix memory including, in each cross-point circuit, a memory cell having a charge storage diode and a metal semiconductor diode in a series aiding circuit arrangement. An information bit is written into any selected memory cell by forward biasing both diodes of the selected cell thereby generating minority carrier charge in the charge storage diode. Thereafter the charge is stored in the cell by applying reverse bias to the two diodes for transferring the charge to the junction capacitance of the metal semiconductor diode. The information bit stored in the selected cell is read out by applying a forward bias voltage ramp function to the cell.

    Current-switching detector
    6.
    发明授权
    Current-switching detector 失效
    电流开关检测器

    公开(公告)号：US3610948A

    公开(公告)日：1971-10-05

    申请号：US3610948D

    申请日：1969-10-23

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： WAABEN SIGURD G

    IPC: H02H3/02 ,  H02H3/24 ,  H02H7/20

    CPC classification number: H02H3/24 ,  H02H3/023

    Abstract: A series of charge-storage diodes having different minoritycarrier lifetimes are connected between power supply lines and are arranged so that a normally nonconducting signal branch is in parallel with the shortest minority-carrier-lifetime chargestorage diode. The charge-storage diodes and the signal branch respond to a short circuit condition across the power supply lines by switching reverse polarity minority-carrier current, conducted through the charge-storage diodes, from the short minority-carrier-lifetime diode to the signal branch. A signal then is developed in the signal branch for enabling a protection device to short circuit the power supply lines or for taking other desired action.

    Contact protection using charge storage diodes
    8.
    发明授权
    Contact protection using charge storage diodes 失效
    使用充电储存二极管进行接触保护

    公开(公告)号：US3601622A

    公开(公告)日：1971-08-24

    申请号：US3601622D

    申请日：1969-04-17

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： WAABEN SIGURD G

    IPC: H01H9/54 ,  H01H9/30

    CPC classification number: H01H9/54

    Abstract: A diode characterized by a long minority carrier lifetime and supplied with a charging current is connected in parallel with a pair of electrical contacts. When the contacts are opened the diode provides, in effect, a short circuit across the contacts thereby preventing arcing for a predetermined period until the accumulated charge in the diode is depleted.

    Digit line coupling circuits for digital stores
    9.
    发明授权
    Digit line coupling circuits for digital stores 失效
    用于数字存储的数字线路耦合电路

    公开(公告)号：US3588849A

    公开(公告)日：1971-06-28

    申请号：US3588849D

    申请日：1968-06-19

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： LYNES DENNIS J ,  SHICHMAN HAROLD ,  WAABEN SIGURD G

    IPC: G11C11/06 ,  G11C7/00 ,  G11C11/14

    CPC classification number: G11C11/06007

    Abstract: A GROUP OF DIRECT COUPLING ARRANGEMENTS FOR A MAGNETIC MEMORY PROVIDE DESIGN ALTERNATIVES WHICH REDUCE MAGNETIC MEMORY CYCLE TIME AND FABRICATION COST. IN EACH ARRANGEMENT, BALANCED DIGIT LINES, WHICH ARE ARRANGED IN TWO SYMMETRICAL MODULES, ARE DIRECT CURRENT COUPLED TO BOTH A DIGIT DRIVE CIRCUIT AND AN AMPLIFIER-DETECTOR CIRCUIT. WORD SELECTION CIRCUITS ARE ARRANGED SYMMETRICALLY TO COUPLE SIMILAR SPURIOUS NOISE SIGNALS INTO THE FIGIT LINES OF BOTH SYMMETRICAL MODULES. THE AMPLIFIER-DETECTOR CIRCUIT IS ARRANGED TO OPERATE IN ITS REGION OF LINEAR CONDUCTION IN RESPONSE TO DIGIT DRIVE SIGNALS AND TO CONVERT INFORMATION SIGNALS FROM THE DIGIT LINES INTO COMPLEMENTARY LEVEL OUTPUT SIGNALS WITHOUT REFLECTING AN IMPEDANCE UNBALANCE ONTO THE DIGIT LINES. IN EACH ARRANGEMENT, A DIRECT CURRENT COUPLINE CIRCUIT IS DESIGNED SO THAT THE DIGIT DRIVE SIGNALS AND THE NOISE SIGNALS ARE REJECTED AND INFORMATION SIGNALS ARE DETECTED.

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