公开(公告)号：US3540010A

公开(公告)日：1970-11-10

申请号：US3540010D

申请日：1968-08-27

Applicant: BELL TELEPHONE LABOR INC

Inventor： HEIGHTLEY JOHN D ,  LYNES DENNIS J ,  SLEMMER WILLIAM C

IPC: G11C11/411 ,  G11C11/414 ,  G11C11/415 ,  G11C11/416 ,  H01L27/102 ,  H03K3/012 ,  H03K3/013 ,  G11C11/36

CPC classification number: H03K3/012 ,  G11C11/4113 ,  G11C11/414 ,  G11C11/415 ,  G11C11/416 ,  H01L27/1025 ,  H03K3/013 ,  Y10S148/037 ,  Y10S148/085 ,  Y10S148/139

公开(公告)号：US3588849A

公开(公告)日：1971-06-28

申请号：US3588849D

申请日：1968-06-19

Applicant: BELL TELEPHONE LABOR INC

Inventor： LYNES DENNIS J ,  SHICHMAN HAROLD ,  WAABEN SIGURD G

IPC: G11C11/06 ,  G11C7/00 ,  G11C11/14

CPC classification number: G11C11/06007

Abstract: A GROUP OF DIRECT COUPLING ARRANGEMENTS FOR A MAGNETIC MEMORY PROVIDE DESIGN ALTERNATIVES WHICH REDUCE MAGNETIC MEMORY CYCLE TIME AND FABRICATION COST. IN EACH ARRANGEMENT, BALANCED DIGIT LINES, WHICH ARE ARRANGED IN TWO SYMMETRICAL MODULES, ARE DIRECT CURRENT COUPLED TO BOTH A DIGIT DRIVE CIRCUIT AND AN AMPLIFIER-DETECTOR CIRCUIT. WORD SELECTION CIRCUITS ARE ARRANGED SYMMETRICALLY TO COUPLE SIMILAR SPURIOUS NOISE SIGNALS INTO THE FIGIT LINES OF BOTH SYMMETRICAL MODULES. THE AMPLIFIER-DETECTOR CIRCUIT IS ARRANGED TO OPERATE IN ITS REGION OF LINEAR CONDUCTION IN RESPONSE TO DIGIT DRIVE SIGNALS AND TO CONVERT INFORMATION SIGNALS FROM THE DIGIT LINES INTO COMPLEMENTARY LEVEL OUTPUT SIGNALS WITHOUT REFLECTING AN IMPEDANCE UNBALANCE ONTO THE DIGIT LINES. IN EACH ARRANGEMENT, A DIRECT CURRENT COUPLINE CIRCUIT IS DESIGNED SO THAT THE DIGIT DRIVE SIGNALS AND THE NOISE SIGNALS ARE REJECTED AND INFORMATION SIGNALS ARE DETECTED.

公开(公告)号：US3573499A

公开(公告)日：1971-04-06

申请号：US3573499D

申请日：1969-05-02

Applicant: BELL TELEPHONE LABOR INC

Inventor： LYNES DENNIS J

IPC: G11C11/402 ,  G11C11/411 ,  H03K3/012 ,  G11C11/40

CPC classification number: G11C11/4026 ,  G11C11/4113 ,  H03K3/012

Abstract: A semiconductor memory characterized by simplified memory cells which operate on the charge storage phenomenon. Each cell comprises a pair of cross-coupled transistors, the collector electrodes of which are connected through separate diodes to a pair of information lines. Power is supplied in pulsed fashion via the information lines. No conventional load impedances are used. The coupling diodes prevent discharge of stored information during intervals in which no power is being supplied. The memory advantageously is embodied as a semiconductor integrated circuit.

公开(公告)号：US3604953A

公开(公告)日：1971-09-14

申请号：US3604953D

申请日：1969-05-15

Applicant: BELL TELEPHONE LABOR INC

Inventor： CARMODY PHILIP M ,  LYNES DENNIS J

IPC: H03K3/33 ,  H03K3/26

CPC classification number: H03K3/33

Abstract: A regenerative switching circuit having two active switching elements uses the charge storage and current limiting capabilities of a PN junction to perform the switching and timing functions. When the circuit is in one state, a forward current flows through a PN junction associated with one of the switching elements, and charge is stored near the junction. When the circuit is switched to its other state, a reverse current flows through the junction for a predetermined period until the stored charge is depleted, whereupon the current is blocked and the circuit reverts to its original state.

公开(公告)号：US3480800A

公开(公告)日：1969-11-25

申请号：US3480800D

申请日：1967-02-06

Applicant: BELL TELEPHONE LABOR INC

Inventor： LYNES DENNIS J ,  WAABEN SIGURD G

IPC: G11C11/416 ,  H03K3/286

CPC classification number: G11C11/416 ,  H03K3/286