Metal-insulator-metal solid-state rectifier
    1.
    发明授权
    Metal-insulator-metal solid-state rectifier 失效
    金属绝缘体 - 金属固态整流器

    公开(公告)号:US3648122A

    公开(公告)日:1972-03-07

    申请号:US3648122D

    申请日:1970-06-19

    CPC classification number: H01L45/00

    Abstract: A metal-insulator-metal layered structure is disclosed which is useful as a rectifier of AC voltage. One of the metal layers is advantageously in the form of a crossgrid-type geometry, in order to afford a large perimeter of contact with the insulator layer. Electrons are injected at the edges of the metal grid through the insulator when the grid goes electrically negative, but not when it goes positive; thereby, rectifying properties are afforded by this metal-insulator-metal structure.

    Abstract translation: 公开了一种可用作交流电压整流器的金属 - 绝缘体 - 金属层状结构。 金属层中的一个有利地是十字网格形状的形式,以便提供与绝缘体层的大的周界。 当电网电气负电时,电子通过绝缘体在金属栅格的边缘注入,而不是当它变为正时; 从而由金属 - 绝缘体 - 金属结构提供整流性能。

    Monolithic semiconductor apparatus adapted for sequential charge transfer
    2.
    发明授权
    Monolithic semiconductor apparatus adapted for sequential charge transfer 失效
    适用于顺序充电转移的单片半导体器件

    公开(公告)号:US3660697A

    公开(公告)日:1972-05-02

    申请号:US3660697D

    申请日:1970-02-16

    CPC classification number: H01L27/1055 G11C19/282 H01L29/76808 H01L29/76841

    Abstract: The invention is a form of monolithic semiconductor apparatus adapted for the storage and manipulation of electronic signals representing information. Basically, the apparatus includes a plurality of spaced localized zones of one type semiconductivity adjacent the surface of a semiconductive bulk portion of the other type conductivity. A plurality of localized electrodes, registered in one-to-one correspondence with the localized zones, are disposed over a dielectric layer covering the semiconductive portions. Each of the electrodes is delimited in lateral extent so as to extend over substantially all of the space between a pair of closest zones and over a substantial portion of only one of that pair of zones so that the capacitance between the electrode and the zone over which it extends is substantially greater than the capacitance between that electrode and the other zone of that pair of zones. Signals in the form of varying deficiencies of majority carriers are stored temporarily in the localized zones and are gated sequentially from one zone to the zone next adjacent upon application of two-phase clock pulses to alternate electrodes. Constant background pulses upon which signals are superimposed are circulated to reduce distortion.

    Abstract translation: 本发明是适于存储和操纵表示信息的电子信号的单片半导体装置的形式。 基本上,该装置包括与另一种类型导电性的半导体本体部分的表面相邻的一个类型半导体性的多个间隔开的局部区域。 在覆盖半导体部分的电介质层上设置多个与局部区域一一对应配置的局部电极。 每个电极以横向范围限定,以便在一对最近区域之间的基本上所有的空间上延伸,并且在该对区域中的仅一个区域的大部分上延伸,使得电极和区域之间的电容 其延伸实质上大于该电极与该对区域的另一区域之间的电容。 多数载波变化不足的信号暂时存储在局部区域中,并且在将两相时钟脉冲应用于交替电极时,从一个区域到下一个相邻的区域依次选通。 叠加信号的恒定背景脉冲被循环以减少失真。

    Apparatus and method for connecting between series and parallel data streams
    3.
    发明授权
    Apparatus and method for connecting between series and parallel data streams 失效
    串联和并行数据流之间的连接的装置和方法

    公开(公告)号:US3885167A

    公开(公告)日:1975-05-20

    申请号:US38677473

    申请日:1973-08-08

    CPC classification number: H03M9/00 G11C19/18 G11C19/287 H01L27/1055

    Abstract: Apparatus and method for converting between series and parallel data streams. In a charge transfer device (CTD) shift register having 2M (M is an integer greater than one) parallel registers each having an input node and an output node, a CTD input logic tree connects all the input nodes to a single data input node, and a CTD output logic tree connects all the output nodes to a single data output node. The input logic tree successively splits up an input data stream into two data streams until the number of data streams is 2M and the output logic tree successively combines data streams from each output node two at a time until a single output data stream is achieved.

    Abstract translation: 用于在串行和并行数据流之间转换的装置和方法。 在具有2M(M是大于1的整数)的并行寄存器中的每个具有输入节点和输出节点的电荷转移装置(CTD)移位寄存器中,CTD输入逻辑树将所有输入节点连接到单个数据输入节点, 并且CTD输出逻辑树将所有输出节点连接到单个数据输出节点。 输入逻辑树将输入数据流连续地分成两个数据流,直到数据流的数量为2M,并且输出逻辑树一次连续地组合来自每个输出节点的数据流2,直到实现单个输出数据流。

Patent Agency Ranking