DATA ACCESSING METHOD, DEVICE, AND STORAGE MEDIUM

    公开(公告)号:US20200159461A1

    公开(公告)日:2020-05-21

    申请号:US16689479

    申请日:2019-11-20

    Abstract: Embodiments of the present disclosure provide a data accessing method, a device and a storage medium. The method includes: obtaining a first accessing request and a second accessing request for a storage device; loading first data associated with the first accessing request from a source device to a pre-allocated buffer area with a size same as a size of a single physical storage block of the storage device; determining a first part of the second data when the first size of second data associated with the second accessing request is greater than or equal to the second size of an available space of the buffer area, a size of the first part being the same as the second size; and providing the first data and the first part to a target device associated with the first accessing request and the second accessing request.

    TASK SCHEDULING METHOD AND APPARATUS OF ARTIFICIAL INTELLIGENCE HETEROGENEOUS HARDWARE, DEVICE AND READABLE MEDIUM

    公开(公告)号:US20190114202A1

    公开(公告)日:2019-04-18

    申请号:US16159322

    申请日:2018-10-12

    Abstract: The present disclosure provides a task scheduling method and apparatus of artificial intelligence heterogeneous hardware, a device and a readable medium. The method comprises: receiving a task execution request for a corresponding function sent from an API, the task execution request carrying attribute information of the task; obtaining a priority of the task according to attribute information of the task, wherein a priority of an online service is higher than a priority of an offline task; inserting the corresponding task into a scheduling queue of a corresponding function according to the priority of the task; tasks in the scheduling queue being arranged in a descending order of priorities; controlling in turn a free computing unit in a plurality of computing units of the corresponding function to execute the corresponding task, in the descending order of priorities of the task in the scheduling queue. According to the technical solution of the present embodiment, it is feasible to achieve mixed performance of the offline model training task and online reasoning service according to the difference of priorities, thereby substantially improving the resource utilization rate.

    DATA PROCESSING METHOD AND APPARATUS
    3.
    发明申请

    公开(公告)号:US20180121789A1

    公开(公告)日:2018-05-03

    申请号:US15618817

    申请日:2017-06-09

    CPC classification number: G06N3/04 G06F5/012 G06F7/483 G06N3/0454 G06N3/063

    Abstract: The present application discloses a data processing method and apparatus. A specific implementation of the method includes: receiving floating point data sent from an electronic device; converting the received floating point data into fixed point data according to a data length and a value range of the received floating point data; performing calculation on the obtained fixed point data according to a preset algorithm to obtain result data in a fixed point form; and converting the obtained result data in the fixed point form into result data in a floating point form and sending the result data in the floating point form to the electronic device. This implementation improves the data processing efficiency.

    PROCESSOR AND METHOD FOR EXECUTING INSTRUCTIONS ON PROCESSOR

    公开(公告)号:US20180032336A1

    公开(公告)日:2018-02-01

    申请号:US15279217

    申请日:2016-09-28

    CPC classification number: G06F9/30043 G06F9/3877 G06F12/0875 G06F2212/452

    Abstract: The present application discloses a processor and a method for executing an instruction on a processor. A specific implementation of the processor includes: a host interaction device, an instruction control device, an off-chip memory, an on-chip cache and an array processing device, wherein the host interaction device is configured to exchange data and instructions with a host connected with the processor, wherein the exchanged data has a granularity of a matrix; the off-chip memory is configured to store a matrix received from the host, on which a matrix operation is to be performed; and the instruction control device is configured to convert an external instruction received from the host to a series of memory access instructions and a series of computing instructions and execute the converted instructions. The implementation can improve the execution efficiency of a deep learning algorithm.

    METHOD AND APPARATUS FOR REDUCING STORAGE SPACE OF PARAMETER TABLE, DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM

    公开(公告)号:US20210034644A1

    公开(公告)日:2021-02-04

    申请号:US16814178

    申请日:2020-03-10

    Abstract: Embodiments of the present disclosure relate to a method and apparatus for reducing storage space of a parameter table. The method may include: storing the parameter table in a lookup table system configured to compute an output value of a non-linear function according to an input value of the non-linear function, the parameter table including only an index value associated with an input value on one side of a median in a domain of the non-linear function and a parameter value corresponding to the index value;
    determining, by using a corresponding relationship between the index value associated with the input value on one side and the parameter value corresponding to the index value, a parameter value corresponding to an index value associated with an input value on the other side; and computing the output value by using the input value on the other side and the determined corresponding parameter value.

    METHOD EXECUTED BY COMPUTING DEVICE, APPARATUS, DEVICE AND COMPUTER-READABLE STORAGE MEDIUM

    公开(公告)号:US20210026630A1

    公开(公告)日:2021-01-28

    申请号:US16936676

    申请日:2020-07-23

    Abstract: Embodiments of the present disclosure provide a method, executed by a computing device, for configuring a vector operation, an apparatus, a device, and a storage medium. The method includes obtaining information indicating at least one configurable vector operation parameter. The information indicating the at least one configurable vector operation parameter indicates a type and a value of the configurable vector operation parameter. The method further includes: based on the type and the value of the configurable vector operation parameter, configuring multiple vector operation circuits to enable each of the vector operation circuits to execute a target vector operation including two or more basic vector operations and defined based on the type and value of the configurable vector operation parameter.

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