公开(公告)号：US09142714B2

公开(公告)日：2015-09-22

申请号：US13403151

申请日：2012-02-23

申请人： Vinod Adivarahan ,  Qhalid Fareed ,  Asif Khan

发明人： Vinod Adivarahan ,  Qhalid Fareed ,  Asif Khan

IPC分类号： H01L33/08 ,  H01L33/38 ,  H01L21/02 ,  H01L33/00 ,  H01L33/40 ,  H01L33/64

CPC分类号： H01L33/08 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L33/007 ,  H01L33/38 ,  H01L33/40 ,  H01L33/641

摘要： An improved process for forming a UV emitting diode is described. The process includes providing a substrate. A super-lattice is formed directly on the substrate at a temperature of at least 800 to no more than 1,300° C. wherein the super-lattice comprises AlxInyGa1-x-yN wherein 0

摘要翻译： 描述了用于形成UV发光二极管的改进方法。 该方法包括提供基底。 超晶格在至少800至不超过1300℃的温度下直接形成在衬底上，其中超晶格包括Al x In y Ga 1-x-y N，其中0

公开(公告)号：US09059081B2

公开(公告)日：2015-06-16

申请号：US12442953

申请日：2007-11-13

申请人： Asif Khan ,  Vinod Adivarahan

发明人： Asif Khan ,  Vinod Adivarahan

IPC分类号： H01L21/22 ,  H01L21/225 ,  H01L29/08 ,  H01L29/66 ,  H01L29/778 ,  H01L29/20 ,  H01L33/02 ,  H01L33/32

CPC分类号： H01L29/0847 ,  H01L21/2258 ,  H01L29/0891 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787 ,  H01L33/025 ,  H01L33/325 ,  Y10T428/24802

摘要： The present invention is generally directed to methods of selectively doping a substrate and the resulting selectively doped substrates. The methods include doping an epilayer of a substrate with the selected doping material to adjust the conductivity of either the epilayers grown over a substrate or the substrate itself. The methods utilize lithography to control the location of the doped regions on the substrate. The process steps can be repeated to form a cyclic method of selectively doping different areas of the substrate with the same or different doping materials to further adjust the properties of the resulting substrate.

摘要翻译： 本发明一般涉及选择性掺杂衬底和所得到的选择性掺杂衬底的方法。 所述方法包括用所选择的掺杂材料掺杂衬底的外延层以调节在衬底或衬底本身上生长的外延层的导电性。 该方法利用光刻来控制衬底上的掺杂区域的位置。 可以重复工艺步骤以形成用相同或不同的掺杂材料选择性地掺杂衬底的不同区域以进一步调节所得衬底的性质的循环方法。

公开(公告)号：US08680551B1

公开(公告)日：2014-03-25

申请号：US13070174

申请日：2011-03-23

申请人： Vinod Adivarahan ,  Qhalid Fareed ,  Asif Khan

发明人： Vinod Adivarahan ,  Qhalid Fareed ,  Asif Khan

IPC分类号： H01L33/60

CPC分类号： H01L33/641 ,  H01L33/0079 ,  H01L33/38 ,  H01L2924/0002 ,  H01L2924/00

摘要： A vertically conducting LED comprising, in a layered arrangement: a highly thermally conductive submount wherein the highly conductive submount has a thermal conductivity of at least 100 W/m0K; a p-type layer comprising Al1-x-yInyGax N wherein 0≦x≦1 and 0≦y≦1; a quantum well layer comprising Al1-x-yInyGaxN wherein 0≦x≦1 and 0≦y≦1; an n-type layer comprising Al1-x-yInyGaxN wherein 0≦x≦1 and 0≦y≦1; and an n-type contact layer wherein the LED has a peak emission at 200-365 nm.

摘要翻译： 一种垂直导电LED，其包括：分层布置：高导热基座，其中所述高导电基座具有至少100W / m0K的热导率; 包含Al1-x-yInyGax N的p型层，其中0＆nlE; x＆nlE; 1和0＆amp; nlE; y＆nlE; 1; 包含Al1-x-yInyGaxN的量子阱层，其中0和nlE; x和nlE; 1和0＆amp; nlE; y＆nlE; 1; 包含Al1-x-yInyGaxN的n型层，其中0＆nlE; x＆nlE; 1和0＆lt; nlE; y＆nlE; 1; 和n型接触层，其中LED在200-365nm处具有峰值发射。

公开(公告)号：US08507941B2

公开(公告)日：2013-08-13

申请号：US12997240

申请日：2009-06-06

申请人： Asif Khan ,  Vinod Adivarahan ,  Qhalid Fareed

发明人： Asif Khan ,  Vinod Adivarahan ,  Qhalid Fareed

IPC分类号： H01L33/00

CPC分类号： H01L33/32 ,  H01L27/153 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

摘要： Ultraviolet light emitting illuminator, and method for fabricating same, comprises an array of ultraviolet light emitting diodes and a first and a second terminal. When an alternating current is applied across the first and second terminals and thus to each of the diodes, the illuminator emits ultraviolet light at a frequency corresponding to that of the alternating current. The illuminator includes a template with ultraviolet light emitting quantum wells, a first buffer layer with a first type of conductivity and a second buffer layer with a second type of conductivity, all deposited preferably over a strain-relieving layer. A first and second metal contact are applied to the semiconductor layers having the first and second type of conductivity, respectively, to complete the LED. The emission spectrum ranges from 190 nm to 369 nm. The illuminator may be configured in various materials, geometries, sizes and designs.

摘要翻译： 紫外线发光照明器及其制造方法包括紫外发光二极管阵列和第一和第二终端阵列。 当跨越第一和第二端子以及因此施加到每个二极管的交流电时，照明器以与交流电流相对应的频率发射紫外光。 照明器包括具有紫外光发射量子阱的模板，具有第一类型导电性的第一缓冲层和具有第二导电类型的第二缓冲层，所有这些均优选沉积在应变消除层上。 将第一和第二金属接触分别施加到具有第一和第二导电类型的半导体层以完成LED。 发射光谱范围为190nm至369nm。 照明器可以被配置成各种材料，几何形状，尺寸和设计。

公开(公告)号：US08372697B2

公开(公告)日：2013-02-12

申请号：US11800712

申请日：2007-05-07

申请人： Asif Khan ,  Vinod Adivarahan

发明人： Asif Khan ,  Vinod Adivarahan

IPC分类号： H01L21/20

CPC分类号： H01L21/02164 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518

摘要： Novel silicon dioxide and silicon nitride deposition methods are generally disclosed. In one embodiment, the method includes depositing silicon on the surface of a substrate having a temperature of between about 65° C. and about 350° C. The heated substrate is exposed to a silicon source that is substantially free from an oxidizing agent. The silicon on the surface is then oxidized with an oxygen source that is substantially free from a silicon source. As a result of oxidizing the silicon, a silicon oxide layer forms on the surface of the substrate. Alternatively, or in additionally, a nitrogen source can be provided to produce silicon nitride on the surface of the substrate.

摘要翻译： 通常公开了新的二氧化硅和氮化硅沉积方法。 在一个实施例中，该方法包括在温度在约65℃至约350℃之间的衬底的表面上沉积硅。加热的衬底暴露于基本上不含氧化剂的硅源。 然后用基本上不含硅源的氧源氧化表面上的硅。 作为氧化硅的结果，在衬底的表面上形成氧化硅层。 或者，或另外，可以提供氮源以在衬底的表面上产生氮化硅。

公开(公告)号：US20120145994A1

公开(公告)日：2012-06-14

申请号：US13403151

申请日：2012-02-23

申请人： Vinod ADIVARAHAN ,  Qhalid Fareed ,  Asif Khan

发明人： Vinod ADIVARAHAN ,  Qhalid Fareed ,  Asif Khan

IPC分类号： H01L33/04 ,  H01L33/32

CPC分类号： H01L33/08 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L33/007 ,  H01L33/38 ,  H01L33/40 ,  H01L33/641

摘要： An improved process for forming a UV emitting diode is described. The process includes providing a substrate. A super-lattice is formed directly on the substrate at a temperature of at least 800 to no more than 1,300° C. wherein the super-lattice comprises AlxInyGa1-x-yN wherein 0

摘要翻译： 描述了用于形成UV发光二极管的改进方法。 该方法包括提供基底。 超晶格在至少800至不超过1300℃的温度下直接形成在衬底上，其中超晶格包括Al x In y Ga 1-x-y N，其中0

公开(公告)号：US20120034718A1

公开(公告)日：2012-02-09

申请号：US13226806

申请日：2011-09-07

申请人： Asif Khan

发明人： Asif Khan

IPC分类号： H01L33/48 ,  H01L33/22

CPC分类号： H01L33/06 ,  B82Y20/00 ,  H01L33/0079 ,  H01L33/32

摘要： A vertical geometry light emitting diode with a strain relieved superlattice layer on a substrate comprising doped AlXInYGa1-X-YN. A first doped layer is on the strain relieved superlattice layer AlXInYGa1-X-YN and the first doped layer has a first conductivity. A multilayer quantum well is on the first doped layer comprising alternating layers quantum wells and barrier layers. The multilayer quantum well terminates with a barrier layer on each side thereof. A second doped layer is on the quantum well wherein the second doped layer comprises AlXInYGa1-X-YN and said second doped layer has a different conductivity than said first doped layer. A contact layer is on the third doped layer and the contact layer has a different conductivity than the third doped layer. A metallic contact is in a vertical geometry orientation.

摘要翻译： 在包含掺杂的AlXInYGa1-X-YN的衬底上具有应变消除的超晶格层的垂直几何形状发光二极管。 第一掺杂层位于应变消除的超晶格层AlXInYGa1-X-YN上，第一掺杂层具有第一导电性。 多层量子阱在第一掺杂层上，包括交替层量子阱和势垒层。 多层量子阱在其每一侧终止阻挡层。 第二掺杂层在量子阱上，其中第二掺杂层包含AlXInYGa1-X-YN，而所述第二掺杂层具有与所述第一掺杂层不同的导电性。 接触层在第三掺杂层上，并且接触层具有与第三掺杂层不同的导电性。 金属接触处于垂直几何取向。

公开(公告)号：US20110127571A1

公开(公告)日：2011-06-02

申请号：US12934488

申请日：2009-03-27

申请人： Asif Khan ,  Qhalid Fareed

发明人： Asif Khan ,  Qhalid Fareed

IPC分类号： H01L33/40 ,  H01L33/02 ,  H01L21/20 ,  C23C16/34 ,  C23C16/455 ,  C23C16/448 ,  C23C16/46 ,  C23C16/52

CPC分类号： H01L21/0262 ,  C23C16/4488 ,  C30B25/02 ,  C30B29/403 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/02516 ,  H01L21/0254 ,  H01L33/007

摘要： A device for forming a Group III-V semiconductor on a substrate. The device has a primary chamber comprising a substrate and a heat source for heating the substrate to a first temperature. A secondary chamber comprises a metal source and a second heat source for heating the secondary chamber to a second temperature. A first source is provided which is capable of providing HCl to the secondary chamber wherein the HCl and the metal form metal chloride. A metal-organic source is provided. A metal chloride source is provided which comprises a metal chloride. At least one of the metal chloride, the metal-organic and the second metal chloride react with the nitrogen containing compound to form a Group III-V semiconductor on the substrate.

摘要翻译： 一种用于在衬底上形成III-V族半导体的器件。 该装置具有主室，其包括基板和用于将基板加热至第一温度的热源。 次级室包括金属源和用于将次室加热至第二温度的第二热源。 提供能够向次级室提供HCl的第一来源，其中HCl和金属形成金属氯化物。 提供了一种金属有机源。 提供了包含金属氯化物的金属氯化物源。 金属氯化物，金属有机物和第二金属氯化物中的至少一种与含氮化合物反应，在衬底上形成III-V族半导体。

公开(公告)号：US07706372B2

公开(公告)日：2010-04-27

申请号：US11379264

申请日：2006-04-19

申请人： Christopher J. Pettey ,  Asif Khan ,  Annette Pagan ,  Richard E. Pekkala ,  Robert Haskell Utley

发明人： Christopher J. Pettey ,  Asif Khan ,  Annette Pagan ,  Richard E. Pekkala ,  Robert Haskell Utley

IPC分类号： H04L12/28 ,  H04L12/56

CPC分类号： G06F13/12

摘要： An apparatus and method is provided for allowing I/O devices to be shared and/or partitioned among a plurality of processing complexes within the load/store fabric of each of the processing complexes without requiring modification to the operating system or driver software of the processing complexes. The apparatus and method includes a switch for selectively coupling each of the processing complexes to one or more shared I/O devices. The apparatus and method further includes placing information within packets transmitted between the switch and the I/O devices to identify which of the processing complexes the packets are associated with. The invention further includes an apparatus and method within the shared I/O devices to allow the shared I/O devices to service each of the processing complexes independently.

公开(公告)号：US07620066B2

公开(公告)日：2009-11-17

申请号：US11235513

申请日：2005-09-26

申请人： Christopher J. Pettey ,  Asif Khan ,  Annette Pagan ,  Richard E. Pekkala ,  Robert Haskell Utley

发明人： Christopher J. Pettey ,  Asif Khan ,  Annette Pagan ,  Richard E. Pekkala ,  Robert Haskell Utley

IPC分类号： H04J3/22

CPC分类号： H04L67/24 ,  H04L49/351 ,  H04L49/356

摘要： An apparatus and method is provided for allowing I/O devices to be shared and/or partitioned among a plurality of processing complexes within the load/store fabric of each of the processing complexes without requiring modification to the operating system or driver software of the processing complexes. The apparatus and method includes a switch for selectively coupling each of the processing complexes to one or more shared I/O devices. The apparatus and method further includes placing information within packets transmitted between the switch and the I/O devices to identify which of the processing complexes the packets are associated with. The invention further includes an apparatus and method within the shared I/O devices to allow the shared I/O devices to service each of the processing complexes independently.

摘要翻译： 提供了一种用于允许在每个处理复合体的加载/存储结构内的多个处理复合体之间共享和/或分区I / O设备的装置和方法，而不需要修改处理的操作系统或驱动程序软件 复合物。 该装置和方法包括用于将每个处理复合体选择性地耦合到一个或多个共享I / O设备的开关。 该装置和方法还包括将信息放置在交换机和I / O设备之间传输的分组内，以识别分组与哪个处理复合体相关联。 本发明还包括共享I / O设备内的装置和方法，以允许共享I / O设备独立地为每个处理复合体提供服务。