公开(公告)号：US20220236250A1

公开(公告)日：2022-07-28

申请号：US17617153

申请日：2020-04-15

Applicant: Applied Materials, Inc.

Inventor： Joseph R. JOHNSON ,  Roger QUON ,  Archana KUMAR ,  Ryan Scott SMITH ,  Jeremiah HEBDING ,  Raghav SREENIVASAN

IPC: G01N33/487

Abstract: Embodiments of the present disclosure provide methods of forming solid state dual pore sensors which may be used for biopolymer sequencing and dual pore sensors formed therefrom. In one embodiment, a dual pore sensor features a substrate having a patterned surface comprising two recessed regions spaced apart by a divider wall and a membrane layer disposed on the patterned surface. The membrane layer, the divider wall, and one or more surfaces of each of the two recessed regions collectively define a first fluid reservoir and a second fluid reservoir. A first nanopore is disposed through a portion of the membrane layer disposed over the first fluid reservoir and a second nanopore is disposed through a portion of the membrane layer disposed over the second fluid reservoir. Herein, opposing surfaces of the divider wall are sloped to each form an angle of less than 90° with a respective reservoir facing surface of the membrane layer.

公开(公告)号：US20220242725A1

公开(公告)日：2022-08-04

申请号：US17617151

申请日：2020-04-15

Applicant: Applied Materials, Inc.

Inventor： Joseph R. JOHNSON ,  Roger QUON ,  Archana KUMAR ,  Ryan Scott SMITH ,  Jeremiah HEBDING ,  Raghav SREENIVASAN

IPC: B82B3/00 ,  B81C1/00 ,  B82Y15/00 ,  B82Y40/00

Abstract: Embodiments of the present disclosure provide methods of forming solid state dual pore sensors which may be used for biopolymer sequencing and dual pore sensors formed therefrom. In one embodiment, a method of forming a dual pore sensor includes providing a pattern in a surface of a substrate. Generally, the pattern features two fluid reservoirs separated by a divider wall. The method further includes depositing a layer of sacrificial material into the two fluid reservoirs, depositing a membrane layer, patterning two nanopores through the membrane layer, removing the sacrificial material from the two fluid reservoirs, and patterning one or more fluid ports and a common chamber.

公开(公告)号：US20220016628A1

公开(公告)日：2022-01-20

申请号：US16933597

申请日：2020-07-20

Applicant: Applied Materials, Inc.

Inventor： Ryan Scott SMITH ,  Roger QUON ,  David COLLINS ,  George ODLUM ,  Raghav SREENIVASAN ,  Joseph R. JOHNSON

IPC: B01L3/00 ,  B82B1/00 ,  B82B3/00 ,  G01N27/447 ,  G01N27/40 ,  G01N33/487

Abstract: Embodiments of the present disclosure provide nanopore devices, such as nanopore sensors and/or other nanofluidic devices. In one or more embodiments, a nanopore device contains a substrate, an optional lower protective oxide layer disposed on the substrate, a membrane disposed on the lower protective oxide layer, and an optional upper protective oxide layer disposed on the membrane. The membrane has a pore and contains silicon nitride. The silicon nitride has a nitrogen to silicon ratio of about 0.98 to about 1.02 and the membrane has an intrinsic stress value of about −1,000 MPa to about 1,000 MPa. The nanopore device also contains a channel extending through at least the substrate, the lower protective oxide layer, the membrane, the upper protective oxide layer, and the upper protective silicon nitride layer.

公开(公告)号：US20200088713A1

公开(公告)日：2020-03-19

申请号：US16517121

申请日：2019-07-19

Applicant: Applied Materials, Inc.

Inventor： William J. DURAND ,  Joseph R. JOHNSON ,  Roger QUON

IPC: G01N33/487

Abstract: Methods are provided for manufacturing well-controlled, solid-state nanopores in close proximity and arrays thereof. In one embodiment, a plurality of wells and one or more channels are formed in a substrate. Each of the wells is adjacent a channel. A portion of a sidewall of each well is exposed. The portion of exposed sidewall is nearest to the adjacent channel. The portion of the exposed sidewall of each well is laterally etched towards the adjacent channel. A nanopore is formed connecting the wells to an adjacent channel.

公开(公告)号：US20240282809A1

公开(公告)日：2024-08-22

申请号：US18171090

申请日：2023-02-17

Applicant: Applied Materials, Inc.

Inventor： Amirhasan NOURBAKHSH ,  Raman GAIRE ,  Pei LIU ,  Tyler SHERWOOD ,  Ryan Scott SMITH ,  Roger QUON ,  Siddarth KRISHNAN

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/0619 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66477

Abstract: A super junction device with an increased voltage rating may be formed by decreasing the width of the P-type region and increasing the doping concentration, while also increasing the height of the overall device. However, instead of etching a trench in the N-type material to fill with the P-type material, a trench may be etched for both the P-type region and an adjacent N-type region. This allows the height of the overall device to be increased while maintaining a feasible aspect ratio for the trench. The P-type material may then be formed as a sidewall liner on the trench that is relatively thin compared to the remaining width of the trench. The trench may then be filled with N-type material such that the P-type region fills the space between the N-type regions without any voids or seams, while having a width that would be unattainable using traditional etch-and-fill methods for the P-type region alone.

公开(公告)号：US20220155279A1

公开(公告)日：2022-05-19

申请号：US17591407

申请日：2022-02-02

Applicant: Applied Materials, Inc.

Inventor： Joseph R. JOHNSON ,  Roger QUON

IPC: G01N33/487 ,  B81B1/00 ,  B81C3/00

Abstract: Nanopore flow cells and methods of manufacturing thereof are provided herein. In one embodiment a method of forming a flow cell includes forming a multilayer stack on a first substrate, e.g., a monocrystalline silicon substrate, before transferring the multilayer stack to a second substrate, e.g., a glass substrate. Here, the multilayer stack features a membrane layer, having a first opening formed therethrough, where the membrane layer is disposed on the first substrate, and a material layer is disposed on the membrane layer. The method further includes patterning the second substrate to form a second opening therein and bonding the patterned surface of the second substrate to a surface of the multilayer stack. The method further includes thinning the first substrate and thinning the second substrate. Here, the second substrate is thinned to where the second opening is disposed therethrough. The method further includes removing the thinned first substrate and at least portions of the material layer to expose opposite surfaces of the membrane layer.

公开(公告)号：US20210215664A1

公开(公告)日：2021-07-15

申请号：US16738629

申请日：2020-01-09

Applicant: Applied Materials, Inc.

Inventor： Mark J. SALY ,  Keenan Navarre WOODS ,  Joseph R. JOHNSON ,  Bhaskar Jyoti BHUYAN ,  William J. DURAND ,  Michael CHUDZIK ,  Raghav SREENIVASAN ,  Roger QUON

IPC: G01N33/487 ,  C12Q1/6869 ,  B82Y15/00

Abstract: Embodiments of the present disclosure provide dual pore sensors and methods for producing these dual pore sensors. The method includes forming a film stack, where the film stack contains two silicon layers and two membrane layers, and then etching the film stack to produce a channel extending therethrough and having two reservoirs and two nanopores. The method also includes depositing a oxide layer on inner surfaces of the reservoirs and nanopores, depositing a dielectric layer on the oxide layer, and forming a metal contact extending through a portion of the stack. The method further includes etching the dielectric layers to form wells, etching the first silicon layer to reveal the protective oxide layer deposited on the inner surfaces of a reservoir, and etching the protective oxide layer deposited on the inner surfaces of the reservoirs and the nanopores.