公开(公告)号：US20170194430A1

公开(公告)日：2017-07-06

申请号：US15395928

申请日：2016-12-30

Applicant: Applied Materials, Inc.

Inventor： Bingxi Sun WOOD ,  Michael G. WARD ,  Shiyu SUN ,  Michael CHUDZIK ,  Nam Sung KIM ,  Hua CHUNG ,  Yi-Chiau HUANG ,  Chentsau YING ,  Ying ZHANG ,  Chi-Nung NI ,  Lin DONG ,  Dongqing YANG

IPC: H01L29/06 ,  H01L21/02 ,  H01L29/66 ,  H01L21/311 ,  H01L21/764 ,  H01L21/306 ,  H01L29/423

CPC classification number: H01L29/0673 ,  H01L21/02115 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/764 ,  H01L29/0649 ,  H01L29/0669 ,  H01L29/42392 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/78696

Abstract: The present disclosure provides methods for forming nanowire spacers for nanowire structures with desired materials in horizontal gate-all-around (hGAA) structures for semiconductor chips. In one example, a method of forming nanowire spaces for nanowire structures on a substrate includes performing a lateral etching process on a substrate having a multi-material layer disposed thereon, wherein the multi-material layer including repeating pairs of a first layer and a second layer, the first and second layers each having a first sidewall and a second sidewall respectively exposed in the multi-material layer, wherein the lateral etching process predominately etches the second layer through the second layer forming a recess in the second layer, filling the recess with a dielectric material, and removing the dielectric layer over filled from the recess.

公开(公告)号：US20150118833A1

公开(公告)日：2015-04-30

申请号：US14062741

申请日：2013-10-24

Applicant: Applied Materials, Inc.

Inventor： Jianxin LEI ,  Jothilingam RAMALINGAM ,  Chi-Nung NI

IPC: H01L21/285 ,  H01L29/66 ,  C23C14/34 ,  H01L21/225

CPC classification number: H01L21/28506 ,  C23C14/16 ,  C23C14/3414 ,  C23C14/5813 ,  H01L21/225 ,  H01L21/2254 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/76843 ,  H01L21/76855 ,  H01L29/456 ,  H01L29/66477

Abstract: A method of depositing a contact layer material includes sputtering a target including a metal and a dopant. The contact layer material is conductive and may be used in a transistor device to connect a conductive region, such as a source region or a drain region of metal-oxide semiconductor field effect transistor, to a contact plug. The contact plug is used to connect the source/drain region formed in a semiconducting substrate to metal wiring layers formed above the gate level of a semiconductor device. The resulting contact layer may be a metal silicide including the dopant. In some embodiments, the sputtered metal may be nickel and the dopant may be phosphorous and the resulting contact layer a nickel silicide doped with phosphorous. Embodiments described, in general, can provide reduced contact resistance and thus improved performance in semiconductor devices.

Abstract translation: 沉积接触层材料的方法包括溅射包括金属和掺杂剂的靶。 接触层材料是导电的，并且可以用在晶体管器件中以将诸如金属氧化物半导体场效应晶体管的源极区域或漏极区域的导电区域连接到接触插塞。 接触插头用于将形成在半导体衬底中的源极/漏极区域连接到形成在半导体器件的栅极级上方的金属布线层。 所得到的接触层可以是包括掺杂剂的金属硅化物。 在一些实施例中，溅射金属可以是镍，并且掺杂剂可以是磷，并且所得到的接触层是掺杂有磷的硅化镍。 通常描述的实施例可以提供降低的接触电阻并因此提高半导体器件的性能。