公开(公告)号：US07366512B1

公开(公告)日：2008-04-29

申请号：US11100427

申请日：2005-04-07

申请人： Anastasios Kefalas ,  Jonathan Lin

发明人： Anastasios Kefalas ,  Jonathan Lin

IPC分类号： H04Q7/20 ,  H04Q7/22 ,  H04M1/00 ,  H04B1/38 ,  G06Q50/00

CPC分类号： G06Q10/02 ,  G06Q30/02 ,  G06Q50/12 ,  H04L67/04 ,  H04L67/26

摘要： A customer is alerted to the availability or completion of service by a service provider through communication with a wireless terminal of the customer. The terminal has an assigned identification number and a control channel, and as a first step, the identification number (e.g., telephone number) of the wireless terminal is registered with the service provider. When service for the customer is available or completed, a determination is made of whether the wireless terminal is active. If active, the customer is alerted to the availability or completion of the service, preferably using a preformatted message transmitted to the wireless terminal over the control channel. In one example, the service provider is a restaurant and the customer is alerted to the availability of a table.

摘要翻译： 通过与客户的无线终端的通信，向客户通知服务提供商的可用性或完成服务。 终端具有分配的识别号码和控制信道，作为第一步骤，向服务提供商注册无线终端的识别号码（例如，电话号码）。 当客户的服务可用或完成时，确定无线终端是否活动。 如果活动，则客户被提醒到服务的可用性或完成，优选地使用通过控制信道发送到无线终端的预格式化消息。 在一个示例中，服务提供商是餐馆，并且向客户提醒桌子的可用性。

公开(公告)号：US20080030716A1

公开(公告)日：2008-02-07

申请号：US11804593

申请日：2007-05-18

申请人： Thomas Jeys ,  Antonio Sanchez-Rubio ,  Ronald Hoffeld ,  Jonathan Lin ,  Nicholas Judson ,  George Haldeman ,  Vincenzo Daneu

发明人： Thomas Jeys ,  Antonio Sanchez-Rubio ,  Ronald Hoffeld ,  Jonathan Lin ,  Nicholas Judson ,  George Haldeman ,  Vincenzo Daneu

IPC分类号： G01N21/00 ,  G06F19/00

CPC分类号： G01N21/53 ,  G01B11/002 ,  G01N15/1459 ,  G01N2015/145

摘要： Aerosol and hydrosol particle detection systems without knowledge of a location and velocity of a particle passing through a volume of space, are less efficient than if knowledge of the particle location is known. An embodiment of a particle position detection system capable of determining an exact location of a particle in a fluid stream is discussed. The detection system may employ a patterned illuminating beam, such that once a particle passes through the patterned illuminating beam, a light scattering is produced. The light scattering defines a temporal profile that contains measurement information indicative of an exact particle location. However, knowledge of the exact particle location has several advantages. These advantages include correction of systematic particle measurement errors due to variability of the particle position within the sample volume, targeting of particles based on position, capture of particles based on position, reduced system energy consumption and reduced system complexity.

摘要翻译： 没有了解通过一定空间的颗粒的位置和速度的气溶胶和水溶胶颗粒检测系统比知道颗粒位置的知识效率低。 讨论了能够确定流体流中颗粒的确切位置的粒子位置检测系统的实施例。 检测系统可以使用图案化的照明光束，使得一旦粒子通过图案化的照明光束，就产生光散射。 光散射定义了包含指示精确粒子位置的测量信息的时间曲线。 然而，确切的粒子位置的知识有几个优点。 这些优点包括校正由于样品体积内的颗粒位置的变异性引起的系统的颗粒测量误差，基于位置的颗粒靶向，基于位置的颗粒捕获，降低的系统能量消耗和降低的系统复杂性。

公开(公告)号：US07308568B2

公开(公告)日：2007-12-11

申请号：US11580956

申请日：2006-10-16

申请人： Jonathan Lin ,  Yong Jiang

发明人： Jonathan Lin ,  Yong Jiang

IPC分类号： G03F7/38

CPC分类号： G06F13/385 ,  H03L7/0812 ,  H04J3/0697 ,  H04L49/351 ,  H04L49/352 ,  H04L49/354 ,  H04L49/40

摘要： A network device is provided which includes a device input, at least one port, a frequency doubler, a data I/O device, and a programmable delay locked loop. The frequency doubler is coupled to the input and configured to receive an input signal and output an output signal having double the frequency of the input signal. The data I/O device is configured to output data based upon a reference clock signal. The programmable delay locked loop is coupled to the device input and configured to receive an input signal and to automatically output an output signal being a predetermined amount out of phase from the input signal. An external clock signal received at the device input is input to the frequency doubler. The output of the frequency doubler is input to the data I/O device as a reference clock. Data (e.g., from internal device logic) is output from the data I/O device to the at least one port. The external clock signal is input to the programmable delay locked loop, which outputs an output clock signal having a frequency equal to the frequency of the external clock signal, in synchronization with the data being output.

摘要翻译： 提供一种网络设备，其包括设备输入，至少一个端口，倍频器，数据I / O设备和可编程延迟锁定环路。 倍频器耦合到输入并被配置为接收输入信号并输出​​具有输入信号频率的两倍的输出信号。 数据I / O设备被配置为基于参考时钟信号输出数据。 可编程延迟锁定环路耦合到设备输入端并被配置为接收输入信号并自动输出来自输入信号的异相预定量的输出信号。 在器件输入端接收的外部时钟信号输入倍频器。 倍频器的输出作为参考时钟输入到数据I / O设备。 数据（例如，从内部设备逻辑）从数据I / O设备输出到至少一个端口。 外部时钟信号被输入到可编程延迟锁定环路，与输出的数据同步地输出具有等于外部时钟信号频率的频率的输出时钟信号。

公开(公告)号：US20070055794A1

公开(公告)日：2007-03-08

申请号：US11164777

申请日：2005-12-05

申请人： Willy Chuang ,  Jakie Yeh ,  Shangen Wang ,  Jonathan Lin

发明人： Willy Chuang ,  Jakie Yeh ,  Shangen Wang ,  Jonathan Lin

IPC分类号： G06F3/00

CPC分类号： G06F8/65

摘要： Firmware of an optical storage medium device includes an executable program code and at least one reference data set. A method for modifying the firmware without requiring a compiling process includes inputting an attribute data set for setting a user interface; modifying the firmware by modifying the reference data set according to the attribute data set, wherein the executable program code is not modified when the firmware is being modified; determining if the modified firmware is capable of performing a target operation before the modified firmware is written into the optical storage medium device, wherein the user interface can be displayed according to the attribute data set; displaying the user interface according to the attribute data set; and writing the modified firmware into the optical storage medium device after the modified firmware is capable of performing the target operation.

摘要翻译： 光学存储介质设备的固件包括可执行程序代码和至少一个参考数据集。 一种用于在不需要编译过程的情况下修改固件的方法包括：输入用于设置用户界面的属性数据集; 通过根据属性数据集修改参考数据集来修改固件，其中当修改固件时，不修改可执行程序代码; 在修改的固件被写入光存储介质设备之前，确定修改的固件是否能够执行目标操作，其中可以根据属性数据集来显示用户界面; 根据属性数据集显示用户界面; 以及在修改的固件能够执行目标操作之后将修改的固件写入光存储介质设备。

公开(公告)号：US07068652B2

公开(公告)日：2006-06-27

申请号：US10090797

申请日：2002-03-06

申请人： Jonathan Lin ,  Somayajulu Pullela ,  David Billings

发明人： Jonathan Lin ,  Somayajulu Pullela ,  David Billings

IPC分类号： H04J1/16

CPC分类号： H04L41/0893 ,  H04L47/2441

摘要： A network device includes at least one network port, a masks table, a rules table, a pointers table, and a fast filter processor. The masks table contains filter information and a mask key. The rules table contains corresponding rules to the filter information and is related to the mask table by the mask key. The pointers table contains boundary data related to the rules for corresponding filter information. The fast filter processor is coupled to the mask table, the rules table and the pointers table, and configured to perform at least one binary search for at least one rule related to a data packet received by the network device at the at least one network port, the binary search being limited based on the boundary data in the pointers table.

公开(公告)号：US06920552B2

公开(公告)日：2005-07-19

申请号：US10083291

申请日：2002-02-27

申请人： Jonathan Lin ,  Yong Jiang

发明人： Jonathan Lin ,  Yong Jiang

IPC分类号： H03L7/081 ,  H04J3/06 ,  H04L12/56 ,  G03F7/38

CPC分类号： G06F13/385 ,  H03L7/0812 ,  H04J3/0697 ,  H04L49/351 ,  H04L49/352 ,  H04L49/354 ,  H04L49/40

摘要： A network device is provided which includes a device input, at least one port, a frequency doubler, a data I/O device, and a programmable delay locked loop. The frequency doubler is coupled to the input and configured to receive an input signal and output an output signal having double the frequency of the input signal. The data I/O device is configured to output data based upon a reference clock signal. The programmable delay locked loop is coupled to the device input and configured to receive an input signal and to automatically output an output signal being a predetermined amount out of phase from the input signal. An external clock signal received at the device input is input to the frequency doubler. The output of the frequency doubler is input to the data I/O device as a reference clock. Data (e.g., from internal device logic) is output from the data I/O device to the at least one port. The external clock signal is input to the programmable delay locked loop, which outputs an output clock signal having a frequency equal to the frequency of the external clock signal, in synchronization with the data being output.

摘要翻译： 提供一种网络设备，其包括设备输入，至少一个端口，倍频器，数据I / O设备和可编程延迟锁定环路。 倍频器耦合到输入并被配置为接收输入信号并输出​​具有输入信号频率的两倍的输出信号。 数据I / O设备被配置为基于参考时钟信号输出数据。 可编程延迟锁定环路耦合到设备输入端并被配置为接收输入信号并自动输出来自输入信号的异相预定量的输出信号。 在器件输入端接收的外部时钟信号输入倍频器。 倍频器的输出作为参考时钟输入到数据I / O设备。 数据（例如，从内部设备逻辑）从数据I / O设备输出到至少一个端口。 外部时钟信号被输入到可编程延迟锁定环路，与输出的数据同步地输出具有等于外部时钟信号频率的频率的输出时钟信号。

公开(公告)号：US06211022B1

公开(公告)日：2001-04-03

申请号：US09241265

申请日：1999-02-01

申请人： Jonathan Lin ,  Radu Barsan ,  Sunil Mehta

发明人： Jonathan Lin ,  Radu Barsan ,  Sunil Mehta

IPC分类号： H01L21336

CPC分类号： H01L21/823481 ,  H01L21/3185 ,  H01L21/76202 ,  H01L21/823418

摘要： A nitride layer is deposited over a field oxide layer used to separate transistors formed in a substrate, the nitride layer serving to decrease transistor current leakage. The nitride layer has a dense lattice, effectively blocking H+ and Na+ penetration from overlying layers into the field oxide. Positive ions such as H+ and Na+ penetrating into the field oxide layer cause a p-substrate under the field oxide layer to become inverted or act like an n-type substrate, creating leakage current between source and drain regions of transistors which the field oxide layer separates. When high transistor threshold voltages such as 12 volts or more are desired, the nitride layer provides a significant reduction in current leakage.

摘要翻译： 氮化物层沉积在用于分离形成在衬底中的晶体管的场氧化物层上，氮化物层用于减小晶体管电流泄漏。 氮化物层具有致密的晶格，有效地阻止H +和Na +从上覆层渗透到场氧化物中。 渗透到场氧化物层中的正离子如H +和Na +导致场氧化物层下的p衬底变为反相或类似于n型衬底，在晶体管的源极和漏极区域之间产生漏电流，其中场氧化物层 分开。 当需要诸如12伏特或更高的高晶体管阈值电压时，氮化物层显着降低电流泄漏。

公开(公告)号：US5801551A

公开(公告)日：1998-09-01

申请号：US690768

申请日：1996-08-01

申请人： Jonathan Lin

发明人： Jonathan Lin

IPC分类号： H03K17/693 ,  H03K19/082 ,  H03K19/20

CPC分类号： H03K17/693

摘要： Depletion mode pass gates utilized in a PLD to enable a gate voltage of Vcc to be applied for turn off, as opposed to a higher voltage required for enhancement type devices. With Vcc applied for turn off, gate oxide stress is reduced and chip reliability increased. A decoder utilizing PMOS transistors is further used to supply a negative gate voltage to enable turn off of the depletion mode pass gates. In one embodiment, to prevent pumping the power supply voltage above Vcc when supplying Vcc to gates of the pass gates, the decoder is an all PMOS device using PMOS transistors to connect Vcc to gates of the pass gates. In another embodiment both NMOS and PMOS transistors are utilized, with PMOS blocking transistors utilized to prevent a negative voltage from being applied to the NMOS transistors and causing current leakage. A negative voltage pump is further provided to supply a sufficient negative voltage.

摘要翻译： 在PLD中使用的耗尽模式通过门使得能够施加Vcc的栅极电压以关闭，而不是增强型器件所需的较高电压。 随着Vcc被关闭，栅氧化物应力降低，芯片可靠性提高。 利用PMOS晶体管的解码器还用于提供负栅极电压以使能耗尽型栅极的关断。 在一个实施例中，为了在向通过栅极的栅极提供Vcc时防止将电源电压泵送到Vcc以上，解码器是使用PMOS晶体管将Vcc连接到通过门的栅极的全PMOS器件。 在另一个实施例中，利用NMOS和PMOS晶体管，其中PMOS阻塞晶体管用于防止负电压施加到NMOS晶体管并导致电流泄漏。 还提供负电压泵以提供足够的负电压。

公开(公告)号：US07779400B2

公开(公告)日：2010-08-17

申请号：US11164777

申请日：2005-12-05

申请人： Willy Chuang ,  Jakie Yeh ,  Shangen Wang ,  Jonathan Lin

发明人： Willy Chuang ,  Jakie Yeh ,  Shangen Wang ,  Jonathan Lin

IPC分类号： G06F9/44

CPC分类号： G06F8/65

摘要： Firmware of an optical storage medium device includes an executable program code and at least one reference data set. A method for modifying the firmware without requiring a compiling process includes inputting an attribute data set for setting a user interface; modifying the firmware by modifying the reference data set according to the attribute data set, wherein the executable program code is not modified when the firmware is being modified; determining if the modified firmware is capable of performing a target operation before the modified firmware is written into the optical storage medium device, wherein the user interface can be displayed according to the attribute data set; displaying the user interface according to the attribute data set; and writing the modified firmware into the optical storage medium device after the modified firmware is capable of performing the target operation.

摘要翻译： 光学存储介质设备的固件包括可执行程序代码和至少一个参考数据集。 一种用于在不需要编译过程的情况下修改固件的方法包括：输入用于设置用户界面的属性数据集; 通过根据属性数据集修改参考数据集来修改固件，其中当修改固件时，不修改可执行程序代码; 在修改的固件被写入光存储介质设备之前，确定修改的固件是否能够执行目标操作，其中可以根据属性数据集来显示用户界面; 根据属性数据集显示用户界面; 以及在修改的固件能够执行目标操作之后将修改的固件写入光存储介质设备。

公开(公告)号：US20050268140A1

公开(公告)日：2005-12-01

申请号：US11149182

申请日：2005-06-10

申请人： Jonathan Lin ,  Yong Jiang

发明人： Jonathan Lin ,  Yong Jiang

IPC分类号： H03L7/081 ,  H04J3/06 ,  H04L12/56 ,  G06F1/08

CPC分类号： G06F13/385 ,  H03L7/0812 ,  H04J3/0697 ,  H04L49/351 ,  H04L49/352 ,  H04L49/354 ,  H04L49/40

摘要： A network device is provided which includes a device input, at least one port, a frequency doubler, a data I/O device, and a programmable delay locked loop. The frequency doubler is coupled to the input and configured to receive an input signal and output an output signal having double the frequency of the input signal. The data I/O device is configured to output data based upon a reference clock signal. The programmable delay locked loop is coupled to the device input and configured to receive an input signal and to automatically output an output signal being a predetermined amount out of phase from the input signal. An external clock signal received at the device input is input to the frequency doubler. The output of the frequency doubler is input to the data I/O device as a reference clock. Data (e.g., from internal device logic) is output from the data I/O device to the at least one port. The external clock signal is input to the programmable delay locked loop, which outputs an output clock signal having a frequency equal to the frequency of the external clock signal, in synchronization with the data being output.